From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 5 Sep 2019 20:01:27 +0000 (-0700)
Subject: Merge remote-tracking branch 'origin/master' into xc7dsp
X-Git-Tag: working-ls180~1039^2~194
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e742478e1d4ffc93efd8dfe6f6d7fb53eef0305e;p=yosys.git

Merge remote-tracking branch 'origin/master' into xc7dsp
---

e742478e1d4ffc93efd8dfe6f6d7fb53eef0305e
diff --cc techlibs/common/Makefile.inc
index e6d1c2f29,de94798af..6c0a4fe66
--- a/techlibs/common/Makefile.inc
+++ b/techlibs/common/Makefile.inc
@@@ -28,4 -28,4 +28,5 @@@ $(eval $(call add_share_file,share,tech
  $(eval $(call add_share_file,share,techlibs/common/gate2lut.v))
  $(eval $(call add_share_file,share,techlibs/common/cmp2lut.v))
  $(eval $(call add_share_file,share,techlibs/common/cells.lib))
 +$(eval $(call add_share_file,share,techlibs/common/mul2dsp.v))
+ $(eval $(call add_share_file,share,techlibs/common/dummy.box))
diff --cc techlibs/ecp5/Makefile.inc
index a0c4e34e3,9efb6347f..80eee5004
--- a/techlibs/ecp5/Makefile.inc
+++ b/techlibs/ecp5/Makefile.inc
@@@ -13,8 -13,10 +13,11 @@@ $(eval $(call add_share_file,share/ecp5
  $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram.txt))
  $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/arith_map.v))
  $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/latches_map.v))
 +$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/dsp_map.v))
  
+ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_map.v))
+ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_unmap.v))
+ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_model.v))
  $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.box))
  $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g.lut))
  $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/abc_5g_nowide.lut))
diff --cc techlibs/xilinx/Makefile.inc
index 8996b20fa,2efcf7d90..2cf0e8e33
--- a/techlibs/xilinx/Makefile.inc
+++ b/techlibs/xilinx/Makefile.inc
@@@ -38,8 -38,10 +38,11 @@@ $(eval $(call add_share_file,share/xili
  $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/ff_map.v))
  $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v))
  $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/mux_map.v))
 +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/dsp_map.v))
  
+ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_map.v))
+ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_unmap.v))
+ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_model.v))
  $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.box))
  $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7.lut))
  $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc_xc7_nowide.lut))