From: Topi Pohjolainen <topi.pohjolainen@intel.com>
Date: Sun, 15 May 2016 08:10:05 +0000 (+0300)
Subject: i965/blorp: Tell vertex fetcher about flat inputs
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e762354309ec63b3e5eb053e0860a52fdf036452;p=mesa.git

i965/blorp: Tell vertex fetcher about flat inputs

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
---

diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.c b/src/mesa/drivers/dri/i965/gen6_blorp.c
index 831ff3a5528..2f26fa1a51f 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.c
@@ -170,16 +170,21 @@ gen6_blorp_emit_vertices(struct brw_context *brw,
 {
    gen6_blorp_emit_vertex_data(brw, params);
 
+   const unsigned num_varyings =
+      params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
+   const unsigned num_elements = 2 + num_varyings;
+   const int batch_length = 1 + 2 * num_elements;
+
+   BEGIN_BATCH(batch_length);
+
    /* 3DSTATE_VERTEX_ELEMENTS
     *
     * Fetch dwords 0 - 7 from each VUE. See the comments above where
-    * the vertex_bo is filled with data.
+    * the vertex_bo is filled with data. First element contains dwords
+    * for the VUE header, second the actual position values and the
+    * remaining contain the flat inputs.
     */
    {
-      const int num_elements = 2;
-      const int batch_length = 1 + 2 * num_elements;
-
-      BEGIN_BATCH(batch_length);
       OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (batch_length - 2));
       /* Element 0 */
       OUT_BATCH(GEN6_VE0_VALID |
@@ -197,8 +202,21 @@ gen6_blorp_emit_vertices(struct brw_context *brw,
                 BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_1_SHIFT |
                 BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT |
                 BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT);
-      ADVANCE_BATCH();
    }
+
+   for (unsigned i = 0; i < num_varyings; ++i) {
+      /* Element 2 + i */
+      OUT_BATCH(1 << GEN6_VE0_INDEX_SHIFT |
+                GEN6_VE0_VALID |
+                BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT |
+                (i * 4 * sizeof(float)) << BRW_VE0_SRC_OFFSET_SHIFT);
+      OUT_BATCH(BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT |
+                BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_1_SHIFT |
+                BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_2_SHIFT |
+                BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_3_SHIFT);
+   }
+
+   ADVANCE_BATCH();
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/gen8_blorp.c b/src/mesa/drivers/dri/i965/gen8_blorp.c
index 77ec11f2f4d..13dda928575 100644
--- a/src/mesa/drivers/dri/i965/gen8_blorp.c
+++ b/src/mesa/drivers/dri/i965/gen8_blorp.c
@@ -534,8 +534,12 @@ gen8_blorp_emit_vf_sys_gen_vals_state(struct brw_context *brw)
 
 static void
 gen8_blorp_emit_vf_instancing_state(struct brw_context *brw,
-                                    unsigned num_elems)
+                                    const struct brw_blorp_params *params)
 {
+   const unsigned num_varyings =
+      params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
+   const unsigned num_elems = 2 + num_varyings;
+
    for (unsigned i = 0; i < num_elems; ++i) {
       BEGIN_BATCH(3);
       OUT_BATCH(_3DSTATE_VF_INSTANCING << 16 | (3 - 2));
@@ -752,7 +756,7 @@ gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params)
    gen8_blorp_emit_vf_topology(brw);
    gen8_blorp_emit_vf_sys_gen_vals_state(brw);
    gen6_blorp_emit_vertices(brw, params);
-   gen8_blorp_emit_vf_instancing_state(brw, 2);
+   gen8_blorp_emit_vf_instancing_state(brw, params);
    gen8_blorp_emit_vf_state(brw);
    gen7_blorp_emit_primitive(brw, params);