From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 28 Sep 2022 23:49:46 +0000 (+0100)
Subject: srcstep
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e7774b592b8ad1b214ed9fb00cab919816ca624a;p=openpower-isa.git

srcstep
---

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 9d0b6d75..441b169e 100644
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -1799,7 +1799,9 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop):
             yield from self.do_rc_ov(ins_name, results, overflow, cr0)
 
         # check failfirst
-        ffirst_hit = (yield from self.check_ffirst(rc_en, srcstep))
+        ffirst_hit = False
+        if self.is_svp64_mode:
+            ffirst_hit = (yield from self.check_ffirst(rc_en, srcstep))
 
         # any modified return results?
         yield from self.do_outregs_nia(asmop, ins_name, info,