From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 25 Apr 2022 16:02:11 +0000 (+0100)
Subject: add README
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e77ae021dc39df83ca42a218146106ca7640df34;p=dev-env-setup.git

add README
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+# Libre-SOC Reproducible Build Scripts
+
+This repository contains the Libre-SOC "reproducible builds" scripts.
+Initially begun as a way to ensure that coriolis2 VLSI ASIC layouts
+were reproducible, they've turned into an easy way for developers to
+get started.  
+
+All packages are installed within a baseline debian/10 debootstrapped
+schroot.  For reproducible builds, you have to pick an OS, and debian/10
+is good enough
+
+Prerequisites:
+
+* Strongly recommended that you install a Host OS of Debian.
+* Confirmed working but not supported: ubuntu
+* Also confirmed working with a caveat on X11: archlinux,
+  (which happens to have a port of debootstrap)
+
+Installs (at recent but usually specific - reproducible - versions):
+
+* coriolis2
+* yosys
+* symbiyosys, z3 solver, yices, sby
+* ghdl
+* yosys-ghdl
+* nextpnr-ecp5
+* nextpnr-xilinx
+* symbiflow
+* nmigen (a Registered Trademark of M-Labs)
+* verilator
+* icarus verilog
+* cocotb
+* a ton of FPGA loader tools, dfu-util, openFPGALoader, ecpprog,
+  fujprog, and associated udev.d rules files.
+
+Note: we don't use conda.  we don't use docker.
+
+# Installation Notes
+
+During their development, each install script had notes taken which,
+if followed carefully, should result in the replication of the script.
+These notes can be found here:
+
+* <https://libre-soc.org/HDL_workflow/>
+* <https://libre-soc.org/HDL_workflow/coriolis2/>
+* <https://libre-soc.org/HDL_workflow/nextpnr/>
+* <https://libre-soc.org/HDL_workflow/nextpnr-xilinx/>
+* <https://libre-soc.org/HDL_workflow/verilator/>
+* <https://libre-soc.org/HDL_workflow/ghdl/>
+* <https://libre-soc.org/HDL_workflow/iverilog/>
+* <https://libre-soc.org/HDL_workflow/cocotb/>
+* <https://libre-soc.org/HDL_workflow/symbiflow/>
+* <https://libre-soc.org/HDL_workflow/fpga-boot-loaders-progs/>
+
+# Contact details
+
+Any questions, improvements, bug-fixes or patches, most welcome:
+please join Libera.Chat IRC #libre-soc, or join the mailing list:
+<https://lists.libre-soc.org/mailman/listinfo/libre-soc-dev>
+
+# Charter
+
+Covered by the Libre-SOC Charter <https://libre-soc.org/charter/discussion/>
+we particularly welcome appropriate Dilbert Cartoons illustrating the
+antithetical polar opposite.