From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Wed, 19 Oct 2016 03:42:44 +0000 (-0700)
Subject: greenpak4: Added GP_PGEN cell definition
X-Git-Tag: yosys-0.7~15^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e78fa157a3decfc6e595089c7d73b9cca785b252;p=yosys.git

greenpak4: Added GP_PGEN cell definition
---

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 668c69829..76bf058d2 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -305,6 +305,27 @@ module GP_PGA(input wire VIN_P, input wire VIN_N, input wire VIN_SEL, output reg
 
 endmodule
 
+module GP_PGEN(input wire nRST, input wire CLK, output reg OUT);
+	initial OUT = 0;
+	parameter PATTERN_DATA = 16'h0;
+	parameter PATTERN_LEN = 4'd16;
+
+	reg[3:0] count = 0;
+	always @(posedge CLK) begin
+		if(!nRST)
+			OUT <= PATTERN_DATA[0];
+
+		else begin
+			count <= count + 1;
+			OUT <= PATTERN_DATA[count];
+
+			if( (count + 1) == PATTERN_LEN)
+				count <= 0;			
+		end
+	end
+	
+endmodule
+
 module GP_POR(output reg RST_DONE);
 	parameter POR_TIME = 500;