From: Tom Tromey Date: Fri, 23 Apr 2021 01:51:54 +0000 (-0600) Subject: Remove and modernize dependencies in sim X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e7d8f1da7116cd7d0ff0b7c363240d86e164fd7e;p=binutils-gdb.git Remove and modernize dependencies in sim Some spots in the sim build used manual dependencies, and some spots did a compilation by hand but did not use the automatic dependency tracking code. This patch fixes these spots. I didn't touch ppc, because it doesn't use the common Makefile code. I also didn't touch objects that are for the build machine, because automatic dependencies don't work for those. sim/arm/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (armemu26.o, armemu32.o): Use COMPILE and POSTCOMPILE. sim/bpf/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (arch.o, cpu.o, sim-if.o, traps.o): Remove. (mloop-le.o, mloop-be.o, decode-le.o, decode-be.o, sim-le.o) (sim-be.o): Use COMPILE and POSTCOMPILE. (SIM_EXTRA_DEPS): Add eng-le.h, eng-be.h. sim/cr16/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/cris/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (sim-if.o, dv-cris.o, dv-rv.o, arch.o, traps.o) (devices.o, crisv10f.o, mloopv10f.o, cpuv10.o, decodev10.o) (modelv10.o, crisv32f.o, mloopv32f.o, cpuv32.o, decodev32.o) (modelv32.o): Remove. (SIM_EXTRA_DEPS): Add engv10.h. sim/d10v/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (SIM_EXTRA_DEPS): New variable. (simops.o): Remove. sim/frv/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (arch.o, devices.o, frv.o, traps.o, pipeline.o) (interrupts.o, memory.o, cache.o, options.o, reset.o) (registers.o, profile.o, profile-fr400.o, profile-fr450.o) (profile-fr500.o, profile-fr550.o, sim-if.o, mloop.o, cpu.o) (decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/iq2000/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (sim-if.o): Remove. (arch.o): Use COMPILE and POSTCOMPILE. (devices.o, iq2000.o, mloop.o, cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/lm32/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (arch.o, traps.o, sim-if.o, lm32.o, mloop.o) (cpu.o, decode.o, sem.o, model.o): Remove. (SIM_EXTRA_DEPS): Add eng.h. sim/m32r/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (sim-if.o, arch.o, traps.o, traps-linux.o) (devices.o, m32r.o, mloop.o, cpu.o, decode.o, sem.o, model.o) (m32rx.o, mloopx.o, cpux.o, decodex.o, semx.o, modelx.o) (m32r2.o, mloop2.o, cpu2.o, decode2.o, sem2.o, model2.o): Remove. (SIM_EXTRA_DEPS): Add eng.h, engx.h, eng2.h. sim/m68hc11/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (interp.o): Remove. sim/mips/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o): Remove. (SIM_EXTRA_DEPS): New variable. sim/mn10300/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (interp.o): Remove. (idecode.o op_utils.o semantics.o): Remove. sim/or1k/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (mloop.o, arch.o, cpu.o, decode.o, sem.o) (sem-switch.o, model.o): Remove. sim/rl78/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (reg.o, rl78.o): Remove. sim/rx/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) (misc.o, reg.o, rx.o, syscalls.o, trace.o): Remove. sim/sh/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (SIM_EXTRA_DEPS): New variable. (interp.o): Remove. sim/v850/ChangeLog 2021-04-22 Tom Tromey * Makefile.in (interp.o, simops.o, semantics.o): Remove. --- diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 35953e4678a..a607c356b67 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (armemu26.o, armemu32.o): Use COMPILE and + POSTCOMPILE. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/arm/Makefile.in b/sim/arm/Makefile.in index ff8beb5ce34..29166952ce1 100644 --- a/sim/arm/Makefile.in +++ b/sim/arm/Makefile.in @@ -29,8 +29,10 @@ SIM_OBJS = \ ## COMMON_POST_CONFIG_FRAG -armemu26.o: armemu.c armdefs.h armemu.h - $(CC) -c $(srcdir)/armemu.c -o armemu26.o $(ALL_CFLAGS) +armemu26.o: armemu.c + $(COMPILE) $(srcdir)/armemu.c + $(POSTCOMPILE) -armemu32.o: armemu.c armdefs.h armemu.h - $(CC) -c $(srcdir)/armemu.c -o armemu32.o -DMODE32 $(ALL_CFLAGS) +armemu32.o: armemu.c + $(COMPILE) -DMODE32 $(srcdir)/armemu.c + $(POSTCOMPILE) diff --git a/sim/bpf/ChangeLog b/sim/bpf/ChangeLog index 0509ae55c85..47fb5a796bd 100644 --- a/sim/bpf/ChangeLog +++ b/sim/bpf/ChangeLog @@ -1,3 +1,10 @@ +2021-04-22 Tom Tromey + + * Makefile.in (arch.o, cpu.o, sim-if.o, traps.o): Remove. + (mloop-le.o, mloop-be.o, decode-le.o, decode-be.o, sim-le.o) + (sim-be.o): Use COMPILE and POSTCOMPILE. + (SIM_EXTRA_DEPS): Add eng-le.h, eng-be.h. + 2021-04-21 Mike Frysinger * aclocal.m4: Regenerate. diff --git a/sim/bpf/Makefile.in b/sim/bpf/Makefile.in index 8052a900713..abc89fec390 100644 --- a/sim/bpf/Makefile.in +++ b/sim/bpf/Makefile.in @@ -35,6 +35,7 @@ SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) \ arch.h \ bpf-sim.h \ + eng-le.h eng-be.h \ $(srcdir)/../../opcodes/bpf-desc.h \ $(srcdir)/../../opcodes/bpf-opc.h @@ -60,33 +61,26 @@ BPF_INCLUDE_DEPS = \ # Dependencies for binaries from CGEN generated source -arch.o: arch.c $(SIM_MAIN_DEPS) -cpu.o: cpu.c $(BPF_INCLUDE_DEPS) -decode-le.o: decode-le.c $(BPF_INCLUDE_DEPS) -decode-be.o: decode-be.c $(BPF_INCLUDE_DEPS) - -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h - $(COMPILE) $< +mloop-le.o: mloop-le.c + $(COMPILE) -DWANT_ISA_EBPFLE mloop-le.c $(POSTCOMPILE) - -traps.o: traps.c $(SIM_MAIN_DEPS) eng.h - $(COMPILE) $< +mloop-be.o: mloop-be.c + $(COMPILE) -DWANT_ISA_EBPFBE mloop-be.c $(POSTCOMPILE) -mloop-le.o: mloop-le.c $(BPF_INCLUDE_DEPS) - $(CC) -c mloop-le.c $(ALL_CFLAGS) -DWANT_ISA_EBPFLE -mloop-be.o: mloop-be.c $(BPF_INCLUDE_DEPS) - $(CC) -c mloop-be.c $(ALL_CFLAGS) -DWANT_ISA_EBPFBE - -decode-le.o: decode-le.c $(BPF_INCLUDE_DEPS) - $(CC) -c $(srcdir)/decode-le.c $(ALL_CFLAGS) -DWANT_ISA_EBPFLE +decode-le.o: decode-le.c + $(COMPILE) -DWANT_ISA_EBPFLE $(srcdir)/decode-le.c + $(POSTCOMPILE) decode-be.o: decode-be.c $(BPF_INCLUDE_DEPS) - $(CC) -c $(srcdir)/decode-be.c $(ALL_CFLAGS) -DWANT_ISA_EBPFBE + $(COMPILE) -DWANT_ISA_EBPFBE $(srcdir)/decode-be.c + $(POSTCOMPILE) -sem-le.o: sem-le.c $(BPF_INCLUDE_DEPS) - $(CC) -c $(srcdir)/sem-le.c $(ALL_CFLAGS) -DWANT_ISA_EBPFLE -sem-be.o: sem-be.c $(BPF_INCLUDE_DEPS) - $(CC) -c $(srcdir)/sem-be.c $(ALL_CFLAGS) -DWANT_ISA_EBPFBE +sem-le.o: sem-le.c + $(COMPILE) -DWANT_ISA_EBPFLE $(srcdir)/sem-le.c + $(POSTCOMPILE) +sem-be.o: sem-be.c + $(COMPILE) -DWANT_ISA_EBPFBE $(srcdir)/sem-be.c + $(POSTCOMPILE) arch = bpf diff --git a/sim/cr16/ChangeLog b/sim/cr16/ChangeLog index 42c3d4c5ba7..0fe6add6780 100644 --- a/sim/cr16/ChangeLog +++ b/sim/cr16/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (SIM_EXTRA_DEPS): New variable. + (simops.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/cr16/Makefile.in b/sim/cr16/Makefile.in index 7be0537985b..8cfe3ea3b26 100644 --- a/sim/cr16/Makefile.in +++ b/sim/cr16/Makefile.in @@ -25,6 +25,8 @@ SIM_OBJS = \ simops.o SIM_EXTRA_CLEAN = clean-extra +SIM_EXTRA_DEPS = simops.h + INCLUDE = cr16_sim.h $(srcroot)/include/gdb/callback.h targ-vals.h \ $(srcroot)/include/gdb/sim-cr16.h @@ -33,8 +35,6 @@ NL_TARGET = -DNL_TARGET_cr16 ## COMMON_POST_CONFIG_FRAG -simops.o: simops.h - simops.h: gencode ./gencode -h >$@ diff --git a/sim/cris/ChangeLog b/sim/cris/ChangeLog index 62981606e53..bcebb8f5fec 100644 --- a/sim/cris/ChangeLog +++ b/sim/cris/ChangeLog @@ -1,3 +1,11 @@ +2021-04-22 Tom Tromey + + * Makefile.in (sim-if.o, dv-cris.o, dv-rv.o, arch.o, traps.o) + (devices.o, crisv10f.o, mloopv10f.o, cpuv10.o, decodev10.o) + (modelv10.o, crisv32f.o, mloopv32f.o, cpuv32.o, decodev32.o) + (modelv32.o): Remove. + (SIM_EXTRA_DEPS): Add engv10.h. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in index f932db28a79..87c1efe4682 100644 --- a/sim/cris/Makefile.in +++ b/sim/cris/Makefile.in @@ -36,7 +36,7 @@ SIM_OBJS = \ # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS. SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \ - arch.h cpuall.h cris-sim.h cris-desc.h + arch.h cpuall.h cris-sim.h cris-desc.h engv10.h SIM_EXTRA_CLEAN = cris-clean @@ -47,19 +47,6 @@ NL_TARGET = -DNL_TARGET_cris arch = cris -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(sim-core_h) $(sim-options_h) - -# Needs CPU-specific knowledge. -dv-cris.o: dv-cris.c $(SIM_MAIN_DEPS) $(sim-core_h) - -# This is the same rule as dv-core.o etc. -dv-rv.o: dv-rv.c $(hw_main_headers) $(sim_main_headers) - -arch.o: arch.c $(SIM_MAIN_DEPS) - -traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) $(sim-options_h) -devices.o: devices.c $(SIM_MAIN_DEPS) - # rvdummy is just used for testing. It does nothing if # --enable-sim-hardware isn't active. @@ -78,8 +65,6 @@ CRISV10F_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ cpuv10.h decodev10.h engv10.h -crisv10f.o: crisv10f.c cris-tmpl.c $(CRISV10F_INCLUDE_DEPS) - # FIXME: What is mono and what does "Use of `mono' is wip" mean (other # than the apparent; some "mono" feature is work in progress)? mloopv10f.c engv10.h: stamp-v10fmloop @@ -90,11 +75,6 @@ stamp-v10fmloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile $(SHELL) $(srcroot)/move-if-change eng.hin engv10.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv10f.c touch stamp-v10fmloop -mloopv10f.o: mloopv10f.c semcrisv10f-switch.c $(CRISV10F_INCLUDE_DEPS) - -cpuv10.o: cpuv10.c $(CRISV10F_INCLUDE_DEPS) -decodev10.o: decodev10.c $(CRISV10F_INCLUDE_DEPS) -modelv10.o: modelv10.c $(CRISV10F_INCLUDE_DEPS) # CRISV32 objs @@ -102,8 +82,6 @@ CRISV32F_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ cpuv32.h decodev32.h engv32.h -crisv32f.o: crisv32f.c cris-tmpl.c $(CRISV32F_INCLUDE_DEPS) - # FIXME: What is mono and what does "Use of `mono' is wip" mean (other # than the apparent; some "mono" feature is work in progress)? mloopv32f.c engv32.h: stamp-v32fmloop @@ -116,11 +94,6 @@ stamp-v32fmloop: stamp-v10fmloop $(srcdir)/../common/genmloop.sh mloop.in Makefi $(SHELL) $(srcroot)/move-if-change eng.hin engv32.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloopv32f.c touch stamp-v32fmloop -mloopv32f.o: mloopv32f.c semcrisv32f-switch.c $(CRISV32F_INCLUDE_DEPS) - -cpuv32.o: cpuv32.c $(CRISV32F_INCLUDE_DEPS) -decodev32.o: decodev32.c $(CRISV32F_INCLUDE_DEPS) -modelv32.o: modelv32.c $(CRISV32F_INCLUDE_DEPS) cris-clean: for v in 10 32; do \ diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index cfd54ba015b..1860b6b3a8f 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (SIM_EXTRA_DEPS): New variable. + (simops.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/d10v/Makefile.in b/sim/d10v/Makefile.in index c2907fc5879..13b902dec5d 100644 --- a/sim/d10v/Makefile.in +++ b/sim/d10v/Makefile.in @@ -26,6 +26,8 @@ SIM_OBJS = \ endian.o SIM_EXTRA_CLEAN = clean-extra +SIM_EXTRA_DEPS = simops.h + INCLUDE = d10v_sim.h $(srcroot)/include/gdb/callback.h targ-vals.h endian.c \ $(srcroot)/include/gdb/sim-d10v.h @@ -34,8 +36,6 @@ NL_TARGET = -DNL_TARGET_d10v ## COMMON_POST_CONFIG_FRAG -simops.o: simops.h - simops.h: gencode ./gencode -h >$@ diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog index 3be7befe7db..1e1a1b1b73b 100644 --- a/sim/frv/ChangeLog +++ b/sim/frv/ChangeLog @@ -1,3 +1,12 @@ +2021-04-22 Tom Tromey + + * Makefile.in (arch.o, devices.o, frv.o, traps.o, pipeline.o) + (interrupts.o, memory.o, cache.o, options.o, reset.o) + (registers.o, profile.o, profile-fr400.o, profile-fr450.o) + (profile-fr500.o, profile-fr550.o, sim-if.o, mloop.o, cpu.o) + (decode.o, sem.o, model.o): Remove. + (SIM_EXTRA_DEPS): Add eng.h. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/frv/Makefile.in b/sim/frv/Makefile.in index 63d18df31b6..87599614020 100644 --- a/sim/frv/Makefile.in +++ b/sim/frv/Makefile.in @@ -33,7 +33,7 @@ SIM_OBJS = \ SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) \ arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \ - registers.h profile.h \ + registers.h profile.h eng.h \ $(sim-options_h) SIM_EXTRA_CFLAGS = @sim_trapdump@ @@ -47,10 +47,6 @@ NL_TARGET = -DNL_TARGET_frv arch = frv -arch.o: arch.c $(SIM_MAIN_DEPS) - -devices.o: devices.c $(SIM_MAIN_DEPS) - # FRV objs FRVBF_INCLUDE_DEPS = \ @@ -58,23 +54,6 @@ FRVBF_INCLUDE_DEPS = \ $(SIM_EXTRA_DEPS) \ cpu.h decode.h eng.h -frv.o: frv.c $(FRVBF_INCLUDE_DEPS) -traps.o: traps.c $(FRVBF_INCLUDE_DEPS) -pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS) -interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS) -memory.o: memory.c $(FRVBF_INCLUDE_DEPS) -cache.o: cache.c $(FRVBF_INCLUDE_DEPS) -options.o: options.c $(FRVBF_INCLUDE_DEPS) -reset.o: reset.c $(FRVBF_INCLUDE_DEPS) -registers.o: registers.c $(FRVBF_INCLUDE_DEPS) -profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS) -profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS) -profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS) -profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS) -profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS) -sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h - - # FIXME: Use of `mono' is wip. mloop.c eng.h: stamp-mloop stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile @@ -84,12 +63,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c touch stamp-mloop -mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS) - -cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS) -decode.o: decode.c $(FRVBF_INCLUDE_DEPS) -sem.o: sem.c $(FRVBF_INCLUDE_DEPS) -model.o: model.c $(FRVBF_INCLUDE_DEPS) frv-clean: rm -f mloop.c eng.h stamp-mloop diff --git a/sim/iq2000/ChangeLog b/sim/iq2000/ChangeLog index 06f2201f382..0327bf7d2d0 100644 --- a/sim/iq2000/ChangeLog +++ b/sim/iq2000/ChangeLog @@ -1,3 +1,11 @@ +2021-04-22 Tom Tromey + + * Makefile.in (sim-if.o): Remove. + (arch.o): Use COMPILE and POSTCOMPILE. + (devices.o, iq2000.o, mloop.o, cpu.o, decode.o, sem.o, model.o): + Remove. + (SIM_EXTRA_DEPS): Add eng.h. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/iq2000/Makefile.in b/sim/iq2000/Makefile.in index baf49dd3330..6047033b305 100644 --- a/sim/iq2000/Makefile.in +++ b/sim/iq2000/Makefile.in @@ -32,7 +32,7 @@ SIM_OBJS = \ # Extra headers included by sim-main.h. SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) \ - arch.h cpuall.h $(srcdir)/../../opcodes/iq2000-desc.h + arch.h cpuall.h $(srcdir)/../../opcodes/iq2000-desc.h eng.h SIM_EXTRA_CFLAGS = @@ -44,12 +44,9 @@ SIM_EXTRA_CLEAN = iq2000-clean arch = iq2000 -sim-if.o: $(srcdir)/sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - -arch.o: arch.c $(SIM_MAIN_DEPS) - $(CC) -c $(srcdir)/arch.c $(ALL_CFLAGS) -UHAVE_CPU_IQ10BF - -devices.o: $(srcdir)/devices.c $(SIM_MAIN_DEPS) +arch.o: arch.c + $(COMPILE) -UHAVE_CPU_IQ10BF $(srcdir)/arch.c + $(POSTCOMPILE) # IQ2000 objs @@ -57,8 +54,6 @@ IQ2000BF_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ cpu.h decode.h eng.h -iq2000.o: $(srcdir)/iq2000.c $(IQ2000BF_INCLUDE_DEPS) - # FIXME: Use of `mono' is wip. mloop.c eng.h: stamp-mloop stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile @@ -68,12 +63,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c touch stamp-mloop -mloop.o: mloop.c $(srcdir)/sem-switch.c $(IQ2000BF_INCLUDE_DEPS) - -cpu.o: $(srcdir)/cpu.c $(IQ2000BF_INCLUDE_DEPS) -decode.o: $(srcdir)/decode.c $(IQ2000BF_INCLUDE_DEPS) -sem.o: $(srcdir)/sem.c $(IQ2000BF_INCLUDE_DEPS) -model.o: $(srcdir)/model.c $(IQ2000BF_INCLUDE_DEPS) iq2000-clean: rm -f mloop.c eng.h stamp-mloop diff --git a/sim/lm32/ChangeLog b/sim/lm32/ChangeLog index 7f2f8bc4b17..a9d59f84054 100644 --- a/sim/lm32/ChangeLog +++ b/sim/lm32/ChangeLog @@ -1,3 +1,9 @@ +2021-04-22 Tom Tromey + + * Makefile.in (arch.o, traps.o, sim-if.o, lm32.o, mloop.o) + (cpu.o, decode.o, sem.o, model.o): Remove. + (SIM_EXTRA_DEPS): Add eng.h. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in index 633ffec8fd8..51e6269d27c 100644 --- a/sim/lm32/Makefile.in +++ b/sim/lm32/Makefile.in @@ -14,7 +14,8 @@ SIM_OBJS = \ # List of extra dependencies. # Generally this consists of simulator specific files included by sim-main.h. -SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h +SIM_EXTRA_DEPS = $(CGEN_INCLUDE_DEPS) $(srcdir)/../../opcodes/lm32-desc.h \ + eng.h # List of flags to always pass to $(CC). #SIM_EXTRA_CFLAGS = @@ -28,18 +29,10 @@ NL_TARGET = -DNL_TARGET_lm32 arch = lm32 -arch.o: arch.c $(SIM_MAIN_DEPS) - -traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) - -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - LM32BF_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ cpu.h decode.h eng.h -lm32.o: lm32.c $(LM32BF_INCLUDE_DEPS) - # FIXME: Use of `mono' is wip. mloop.c eng.h: stamp-mloop stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile @@ -49,12 +42,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c touch stamp-mloop -mloop.o: mloop.c sem-switch.c - -cpu.o: cpu.c $(LM32BF_INCLUDE_DEPS) -decode.o: decode.c $(LM32BF_INCLUDE_DEPS) -sem.o: sem.c $(LM32BF_INCLUDE_DEPS) -model.o: model.c $(LM32BF_INCLUDE_DEPS) lm32-clean: rm -f mloop.c eng.h stamp-mloop diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index a9d71db241a..50a462778df 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,11 @@ +2021-04-22 Tom Tromey + + * Makefile.in (sim-if.o, arch.o, traps.o, traps-linux.o) + (devices.o, m32r.o, mloop.o, cpu.o, decode.o, sem.o, model.o) + (m32rx.o, mloopx.o, cpux.o, decodex.o, semx.o, modelx.o) + (m32r2.o, mloop2.o, cpu2.o, decode2.o, sem2.o, model2.o): Remove. + (SIM_EXTRA_DEPS): Add eng.h, engx.h, eng2.h. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index 4111c2e17d2..fe470f6fc26 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -37,7 +37,8 @@ SIM_OBJS = \ # Extra headers included by sim-main.h. SIM_EXTRA_DEPS = \ $(CGEN_INCLUDE_DEPS) \ - arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h + arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h \ + eng.h engx.h eng2.h SIM_EXTRA_CFLAGS = @sim_extra_cflags@ @@ -50,22 +51,12 @@ NL_TARGET = -DNL_TARGET_m32r arch = m32r -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - -arch.o: arch.c $(SIM_MAIN_DEPS) - -traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) -traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS) -devices.o: devices.c $(SIM_MAIN_DEPS) - # M32R objs M32RBF_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ cpu.h decode.h eng.h -m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS) - # FIXME: Use of `mono' is wip. mloop.c eng.h: stamp-mloop ; @true stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile @@ -75,12 +66,6 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c touch stamp-mloop -mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS) - -cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS) -decode.o: decode.c $(M32RBF_INCLUDE_DEPS) -sem.o: sem.c $(M32RBF_INCLUDE_DEPS) -model.o: model.c $(M32RBF_INCLUDE_DEPS) # M32RX objs @@ -88,8 +73,6 @@ M32RXF_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ cpux.h decodex.h engx.h -m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS) - # FIXME: Use of `mono' is wip. mloopx.c engx.h: stamp-xmloop ; @true stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile @@ -100,12 +83,6 @@ stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile $(SHELL) $(srcroot)/move-if-change engx.hin engx.h $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c touch stamp-xmloop -mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS) - -cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS) -decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS) -semx.o: semx.c $(M32RXF_INCLUDE_DEPS) -modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS) # M32R2 objs @@ -113,8 +90,6 @@ M32R2F_INCLUDE_DEPS = \ $(CGEN_MAIN_CPU_DEPS) \ cpu2.h decode2.h eng2.h -m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS) - # FIXME: Use of `mono' is wip. mloop2.c eng2.h: stamp-2mloop ; @true stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile @@ -126,12 +101,6 @@ stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c touch stamp-2mloop -mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS) -cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS) -decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS) -sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS) -model2.o: model2.c $(M32R2F_INCLUDE_DEPS) - m32r-clean: rm -f mloop.c eng.h stamp-mloop rm -f mloopx.c engx.h stamp-xmloop diff --git a/sim/m68hc11/ChangeLog b/sim/m68hc11/ChangeLog index d3a99225079..9f666da5de1 100644 --- a/sim/m68hc11/ChangeLog +++ b/sim/m68hc11/ChangeLog @@ -1,3 +1,7 @@ +2021-04-22 Tom Tromey + + * Makefile.in (interp.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/m68hc11/Makefile.in b/sim/m68hc11/Makefile.in index 9e2248fc638..9ebcf65c629 100644 --- a/sim/m68hc11/Makefile.in +++ b/sim/m68hc11/Makefile.in @@ -54,7 +54,5 @@ gencode.o: gencode.c gencode: gencode.o $(LINK_FOR_BUILD) $^ -interp.o: interp.c $(INCLUDE) - clean-extra: rm -f gencode m68hc11int.c diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 0ef753ed924..eced42e1e51 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,9 @@ +2021-04-22 Tom Tromey + + * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o): + Remove. + (SIM_EXTRA_DEPS): New variable. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in index 00906451c4c..aa66bb3777f 100644 --- a/sim/mips/Makefile.in +++ b/sim/mips/Makefile.in @@ -83,17 +83,10 @@ all: $(SIM_@sim_gen@_ALL) SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS) +SIM_EXTRA_DEPS = itable.h -## COMMON_POST_CONFIG_FRAG - -interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h - -m16run.o: sim-main.h m16_idecode.h m32_idecode.h m16run.c $(SIM_EXTRA_DEPS) -micromipsrun.o: sim-main.h micromips16_idecode.h micromips32_idecode.h \ - micromips_m32_idecode.h micromipsrun.c $(SIM_EXTRA_DEPS) - -multi-run.o: multi-include.h tmp-mach-multi +## COMMON_POST_CONFIG_FRAG IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all IGEN_INSN=$(srcdir)/mips.igen diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index f257a37383f..8daf6fd19c8 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (interp.o): Remove. + (idecode.o op_utils.o semantics.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/mn10300/Makefile.in b/sim/mn10300/Makefile.in index 120958fce6d..07ef9d973f6 100644 --- a/sim/mn10300/Makefile.in +++ b/sim/mn10300/Makefile.in @@ -39,8 +39,6 @@ SIM_EXTRA_CFLAGS = -DPOLL_QUIT_INTERVAL=0x20 ## COMMON_POST_CONFIG_FRAG -idecode.o op_utils.o semantics.o: targ-vals.h - BUILT_SRC_FROM_IGEN = \ icache.h \ icache.c \ @@ -110,5 +108,3 @@ tmp-igen: $(IGEN_INSN) $(IGEN_INSN_INC) $(IGEN_DC) ../igen/igen $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c $(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c touch tmp-igen - -interp.o: interp.c $(INCLUDE) diff --git a/sim/or1k/ChangeLog b/sim/or1k/ChangeLog index c2fe690c492..910281f3d56 100644 --- a/sim/or1k/ChangeLog +++ b/sim/or1k/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (mloop.o, arch.o, cpu.o, decode.o, sem.o) + (sem-switch.o, model.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in index 24625603cb0..649486fd4e1 100644 --- a/sim/or1k/Makefile.in +++ b/sim/or1k/Makefile.in @@ -75,16 +75,9 @@ stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile $(SHELL) $(srcroot)/move-if-change eng.hin eng.h $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c touch stamp-mloop -mloop.o: mloop.c sem-switch.c $(OR1K32BF_INCLUDE_DEPS) or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS) $(COMPILE) $< $(POSTCOMPILE) -arch.o: arch.c $(SIM_MAIN_DEPS) -cpu.o: cpu.c $(OR1K32BF_INCLUDE_DEPS) -decode.o: decode.c $(OR1K32BF_INCLUDE_DEPS) -sem.o: sem.c $(OR1K32BF_INCLUDE_DEPS) -sem-switch.o: sem-switch.c $(OR1K32BF_INCLUDE_DEPS) -model.o: model.c $(OR1K32BF_INCLUDE_DEPS) sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h $(COMPILE) $< diff --git a/sim/rl78/ChangeLog b/sim/rl78/ChangeLog index 58b7c45c47b..975f3df62c1 100644 --- a/sim/rl78/ChangeLog +++ b/sim/rl78/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) + (reg.o, rl78.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/rx/ChangeLog b/sim/rx/ChangeLog index 5a527fbf906..1434f15d2fc 100644 --- a/sim/rx/ChangeLog +++ b/sim/rx/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (err.o, fpu.o, gdb-if.o, load.o, main.o, mem.o) + (misc.o, reg.o, rx.o, syscalls.o, trace.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/rx/Makefile.in b/sim/rx/Makefile.in index 3c6094caf2e..45b956c1d2e 100644 --- a/sim/rx/Makefile.in +++ b/sim/rx/Makefile.in @@ -47,19 +47,3 @@ LIBS = $B/bfd/libbfd.a $B/libiberty/libiberty.a ## COMMON_POST_CONFIG_FRAG arch = rx - -err.o : err.h -fpu.o : cpu.h fpu.h -gdb-if.o : cpu.h mem.h load.h syscalls.h err.h \ - $(srcdir)/../../include/gdb/callback.h \ - $(srcdir)/../../include/gdb/remote-sim.h \ - $(srcdir)/../../include/gdb/signals.h \ - $(srcdir)/../../include/gdb/sim-rx.h -load.o : ../../bfd/bfd.h cpu.h mem.h -main.o : ../../bfd/bfd.h cpu.h mem.h misc.h load.h trace.h err.h -mem.o : mem.h cpu.h syscalls.h misc.h err.h -misc.o : cpu.h misc.h -reg.o : cpu.h trace.h -rx.o : $(srcdir)/../../include/opcode/rx.h cpu.h mem.h syscalls.h fpu.h -syscalls.o : $(srcdir)/../../include/gdb/callback.h cpu.h mem.h syscalls.h -trace.o : ../../bfd/bfd.h $(srcdir)/../../include/dis-asm.h cpu.h mem.h load.h diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index f223819dcd5..209d8e8a4f9 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -1,3 +1,8 @@ +2021-04-22 Tom Tromey + + * Makefile.in (SIM_EXTRA_DEPS): New variable. + (interp.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/sh/Makefile.in b/sim/sh/Makefile.in index e92b7843dab..84d417287d1 100644 --- a/sim/sh/Makefile.in +++ b/sim/sh/Makefile.in @@ -26,11 +26,10 @@ SIM_OBJS = \ table.o SIM_EXTRA_LIBS = -lm SIM_EXTRA_CLEAN = sh-clean +SIM_EXTRA_DEPS = table.c code.c ppi.c ## COMMON_POST_CONFIG_FRAG -interp.o: interp.c code.c table.c ppi.c $(srcroot)/include/gdb/sim-sh.h - code.c: gencode ./gencode -x >code.c # indent code.c diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog index c1214e73c48..ed9616e1a97 100644 --- a/sim/v850/ChangeLog +++ b/sim/v850/ChangeLog @@ -1,3 +1,7 @@ +2021-04-22 Tom Tromey + + * Makefile.in (interp.o, simops.o, semantics.o): Remove. + 2021-04-22 Tom Tromey * configure: Rebuild. diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in index 250129c549f..1f9d8c55c37 100644 --- a/sim/v850/Makefile.in +++ b/sim/v850/Makefile.in @@ -110,7 +110,3 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen clean-extra: clean-igen rm -f table.c simops.h gencode - -interp.o: interp.c $(INCLUDE) -simops.o: simops.c simops.h $(INCLUDE) targ-vals.h -semantics.o: $(INCLUDE)