From: Matt Turner Date: Tue, 6 Jun 2017 22:43:23 +0000 (-0700) Subject: i965: Rename brw_inst 3src functions in preparation for align1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e7f3b82e033f7c963386e89780a8b652611d0f32;p=mesa.git i965: Rename brw_inst 3src functions in preparation for align1 Reviewed-by: Scott D Phillips --- diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 8bcd3d35cd9..b70e8a5186b 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -766,12 +766,12 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins uint32_t reg_file; enum brw_reg_type type = brw_hw_3src_type_to_reg_type(devinfo, - brw_inst_3src_dst_type(devinfo, inst)); + brw_inst_3src_a16_dst_type(devinfo, inst)); unsigned dst_subreg_nr = - brw_inst_3src_dst_subreg_nr(devinfo, inst) * 4 / + brw_inst_3src_a16_dst_subreg_nr(devinfo, inst) * 4 / brw_reg_type_to_size(type); - if (devinfo->gen == 6 && brw_inst_3src_dst_reg_file(devinfo, inst)) + if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst)) reg_file = BRW_MESSAGE_REGISTER_FILE; else reg_file = BRW_GENERAL_REGISTER_FILE; @@ -783,9 +783,9 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins format(file, ".%u", dst_subreg_nr); string(file, "<1>"); err |= control(file, "writemask", writemask, - brw_inst_3src_dst_writemask(devinfo, inst), NULL); + brw_inst_3src_a16_dst_writemask(devinfo, inst), NULL); err |= control(file, "dest reg encoding", three_source_reg_encoding, - brw_inst_3src_dst_type(devinfo, inst), NULL); + brw_inst_3src_a16_dst_type(devinfo, inst), NULL); return 0; } @@ -936,9 +936,9 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins int err = 0; enum brw_reg_type type = brw_hw_3src_type_to_reg_type(devinfo, - brw_inst_3src_src_type(devinfo, inst)); + brw_inst_3src_a16_src_type(devinfo, inst)); unsigned src0_subreg_nr = - brw_inst_3src_src0_subreg_nr(devinfo, inst) * 4 / + brw_inst_3src_a16_src0_subreg_nr(devinfo, inst) * 4 / brw_reg_type_to_size(type); err |= control(file, "negate", m_negate, @@ -949,16 +949,16 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins brw_inst_3src_src0_reg_nr(devinfo, inst)); if (err == -1) return 0; - if (src0_subreg_nr || brw_inst_3src_src0_rep_ctrl(devinfo, inst)) + if (src0_subreg_nr || brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) format(file, ".%d", src0_subreg_nr); - if (brw_inst_3src_src0_rep_ctrl(devinfo, inst)) + if (brw_inst_3src_a16_src0_rep_ctrl(devinfo, inst)) string(file, "<0,1,0>"); else { string(file, "<4,4,1>"); - err |= src_swizzle(file, brw_inst_3src_src0_swizzle(devinfo, inst)); + err |= src_swizzle(file, brw_inst_3src_a16_src0_swizzle(devinfo, inst)); } err |= control(file, "src da16 reg type", three_source_reg_encoding, - brw_inst_3src_src_type(devinfo, inst), NULL); + brw_inst_3src_a16_src_type(devinfo, inst), NULL); return err; } @@ -968,9 +968,9 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins int err = 0; enum brw_reg_type type = brw_hw_3src_type_to_reg_type(devinfo, - brw_inst_3src_src_type(devinfo, inst)); + brw_inst_3src_a16_src_type(devinfo, inst)); unsigned src1_subreg_nr = - brw_inst_3src_src1_subreg_nr(devinfo, inst) * 4 / + brw_inst_3src_a16_src1_subreg_nr(devinfo, inst) * 4 / brw_reg_type_to_size(type); err |= control(file, "negate", m_negate, @@ -981,16 +981,16 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins brw_inst_3src_src1_reg_nr(devinfo, inst)); if (err == -1) return 0; - if (src1_subreg_nr || brw_inst_3src_src1_rep_ctrl(devinfo, inst)) + if (src1_subreg_nr || brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) format(file, ".%d", src1_subreg_nr); - if (brw_inst_3src_src1_rep_ctrl(devinfo, inst)) + if (brw_inst_3src_a16_src1_rep_ctrl(devinfo, inst)) string(file, "<0,1,0>"); else { string(file, "<4,4,1>"); - err |= src_swizzle(file, brw_inst_3src_src1_swizzle(devinfo, inst)); + err |= src_swizzle(file, brw_inst_3src_a16_src1_swizzle(devinfo, inst)); } err |= control(file, "src da16 reg type", three_source_reg_encoding, - brw_inst_3src_src_type(devinfo, inst), NULL); + brw_inst_3src_a16_src_type(devinfo, inst), NULL); return err; } @@ -1001,9 +1001,9 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins int err = 0; enum brw_reg_type type = brw_hw_3src_type_to_reg_type(devinfo, - brw_inst_3src_src_type(devinfo, inst)); + brw_inst_3src_a16_src_type(devinfo, inst)); unsigned src2_subreg_nr = - brw_inst_3src_src2_subreg_nr(devinfo, inst) * 4 / + brw_inst_3src_a16_src2_subreg_nr(devinfo, inst) * 4 / brw_reg_type_to_size(type); err |= control(file, "negate", m_negate, @@ -1014,16 +1014,16 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins brw_inst_3src_src2_reg_nr(devinfo, inst)); if (err == -1) return 0; - if (src2_subreg_nr || brw_inst_3src_src2_rep_ctrl(devinfo, inst)) + if (src2_subreg_nr || brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) format(file, ".%d", src2_subreg_nr); - if (brw_inst_3src_src2_rep_ctrl(devinfo, inst)) + if (brw_inst_3src_a16_src2_rep_ctrl(devinfo, inst)) string(file, "<0,1,0>"); else { string(file, "<4,4,1>"); - err |= src_swizzle(file, brw_inst_3src_src2_swizzle(devinfo, inst)); + err |= src_swizzle(file, brw_inst_3src_a16_src2_swizzle(devinfo, inst)); } err |= control(file, "src da16 reg type", three_source_reg_encoding, - brw_inst_3src_src_type(devinfo, inst), NULL); + brw_inst_3src_a16_src_type(devinfo, inst), NULL); return err; } diff --git a/src/intel/compiler/brw_eu_compact.c b/src/intel/compiler/brw_eu_compact.c index 7b32270957d..a9da46957a5 100644 --- a/src/intel/compiler/brw_eu_compact.c +++ b/src/intel/compiler/brw_eu_compact.c @@ -911,6 +911,8 @@ brw_try_compact_3src_instruction(const struct gen_device_info *devinfo, #define compact(field) \ brw_compact_inst_set_3src_##field(devinfo, dst, brw_inst_3src_##field(devinfo, src)) +#define compact_a16(field) \ + brw_compact_inst_set_3src_##field(devinfo, dst, brw_inst_3src_a16_##field(devinfo, src)) compact(opcode); @@ -921,20 +923,21 @@ brw_try_compact_3src_instruction(const struct gen_device_info *devinfo, return false; compact(dst_reg_nr); - compact(src0_rep_ctrl); + compact_a16(src0_rep_ctrl); brw_compact_inst_set_3src_cmpt_control(devinfo, dst, true); compact(debug_control); compact(saturate); - compact(src1_rep_ctrl); - compact(src2_rep_ctrl); + compact_a16(src1_rep_ctrl); + compact_a16(src2_rep_ctrl); compact(src0_reg_nr); compact(src1_reg_nr); compact(src2_reg_nr); - compact(src0_subreg_nr); - compact(src1_subreg_nr); - compact(src2_subreg_nr); + compact_a16(src0_subreg_nr); + compact_a16(src1_subreg_nr); + compact_a16(src2_subreg_nr); #undef compact +#undef compact_a16 return true; } @@ -1257,6 +1260,8 @@ brw_uncompact_3src_instruction(const struct gen_device_info *devinfo, #define uncompact(field) \ brw_inst_set_3src_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src)) +#define uncompact_a16(field) \ + brw_inst_set_3src_a16_##field(devinfo, dst, brw_compact_inst_3src_##field(devinfo, src)) uncompact(opcode); @@ -1264,20 +1269,21 @@ brw_uncompact_3src_instruction(const struct gen_device_info *devinfo, set_uncompacted_3src_source_index(devinfo, dst, src); uncompact(dst_reg_nr); - uncompact(src0_rep_ctrl); + uncompact_a16(src0_rep_ctrl); brw_inst_set_3src_cmpt_control(devinfo, dst, false); uncompact(debug_control); uncompact(saturate); - uncompact(src1_rep_ctrl); - uncompact(src2_rep_ctrl); + uncompact_a16(src1_rep_ctrl); + uncompact_a16(src2_rep_ctrl); uncompact(src0_reg_nr); uncompact(src1_reg_nr); uncompact(src2_reg_nr); - uncompact(src0_subreg_nr); - uncompact(src1_subreg_nr); - uncompact(src2_subreg_nr); + uncompact_a16(src0_subreg_nr); + uncompact_a16(src1_subreg_nr); + uncompact_a16(src2_subreg_nr); #undef uncompact +#undef uncompact_a16 } void diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 2b38d959d1f..f842c625bea 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -689,45 +689,45 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, dest.type == BRW_REGISTER_TYPE_D || dest.type == BRW_REGISTER_TYPE_UD); if (devinfo->gen == 6) { - brw_inst_set_3src_dst_reg_file(devinfo, inst, - dest.file == BRW_MESSAGE_REGISTER_FILE); + brw_inst_set_3src_a16_dst_reg_file(devinfo, inst, + dest.file == BRW_MESSAGE_REGISTER_FILE); } brw_inst_set_3src_dst_reg_nr(devinfo, inst, dest.nr); - brw_inst_set_3src_dst_subreg_nr(devinfo, inst, dest.subnr / 16); - brw_inst_set_3src_dst_writemask(devinfo, inst, dest.writemask); + brw_inst_set_3src_a16_dst_subreg_nr(devinfo, inst, dest.subnr / 16); + brw_inst_set_3src_a16_dst_writemask(devinfo, inst, dest.writemask); assert(src0.file == BRW_GENERAL_REGISTER_FILE); assert(src0.address_mode == BRW_ADDRESS_DIRECT); assert(src0.nr < 128); - brw_inst_set_3src_src0_swizzle(devinfo, inst, src0.swizzle); - brw_inst_set_3src_src0_subreg_nr(devinfo, inst, get_3src_subreg_nr(src0)); + brw_inst_set_3src_a16_src0_swizzle(devinfo, inst, src0.swizzle); + brw_inst_set_3src_a16_src0_subreg_nr(devinfo, inst, get_3src_subreg_nr(src0)); brw_inst_set_3src_src0_reg_nr(devinfo, inst, src0.nr); brw_inst_set_3src_src0_abs(devinfo, inst, src0.abs); brw_inst_set_3src_src0_negate(devinfo, inst, src0.negate); - brw_inst_set_3src_src0_rep_ctrl(devinfo, inst, - src0.vstride == BRW_VERTICAL_STRIDE_0); + brw_inst_set_3src_a16_src0_rep_ctrl(devinfo, inst, + src0.vstride == BRW_VERTICAL_STRIDE_0); assert(src1.file == BRW_GENERAL_REGISTER_FILE); assert(src1.address_mode == BRW_ADDRESS_DIRECT); assert(src1.nr < 128); - brw_inst_set_3src_src1_swizzle(devinfo, inst, src1.swizzle); - brw_inst_set_3src_src1_subreg_nr(devinfo, inst, get_3src_subreg_nr(src1)); + brw_inst_set_3src_a16_src1_swizzle(devinfo, inst, src1.swizzle); + brw_inst_set_3src_a16_src1_subreg_nr(devinfo, inst, get_3src_subreg_nr(src1)); brw_inst_set_3src_src1_reg_nr(devinfo, inst, src1.nr); brw_inst_set_3src_src1_abs(devinfo, inst, src1.abs); brw_inst_set_3src_src1_negate(devinfo, inst, src1.negate); - brw_inst_set_3src_src1_rep_ctrl(devinfo, inst, - src1.vstride == BRW_VERTICAL_STRIDE_0); + brw_inst_set_3src_a16_src1_rep_ctrl(devinfo, inst, + src1.vstride == BRW_VERTICAL_STRIDE_0); assert(src2.file == BRW_GENERAL_REGISTER_FILE); assert(src2.address_mode == BRW_ADDRESS_DIRECT); assert(src2.nr < 128); - brw_inst_set_3src_src2_swizzle(devinfo, inst, src2.swizzle); - brw_inst_set_3src_src2_subreg_nr(devinfo, inst, get_3src_subreg_nr(src2)); + brw_inst_set_3src_a16_src2_swizzle(devinfo, inst, src2.swizzle); + brw_inst_set_3src_a16_src2_subreg_nr(devinfo, inst, get_3src_subreg_nr(src2)); brw_inst_set_3src_src2_reg_nr(devinfo, inst, src2.nr); brw_inst_set_3src_src2_abs(devinfo, inst, src2.abs); brw_inst_set_3src_src2_negate(devinfo, inst, src2.negate); - brw_inst_set_3src_src2_rep_ctrl(devinfo, inst, - src2.vstride == BRW_VERTICAL_STRIDE_0); + brw_inst_set_3src_a16_src2_rep_ctrl(devinfo, inst, + src2.vstride == BRW_VERTICAL_STRIDE_0); if (devinfo->gen >= 7) { /* Set both the source and destination types based on dest.type, @@ -738,20 +738,20 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, */ switch (dest.type) { case BRW_REGISTER_TYPE_F: - brw_inst_set_3src_src_type(devinfo, inst, BRW_3SRC_TYPE_F); - brw_inst_set_3src_dst_type(devinfo, inst, BRW_3SRC_TYPE_F); + brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_F); + brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_F); break; case BRW_REGISTER_TYPE_DF: - brw_inst_set_3src_src_type(devinfo, inst, BRW_3SRC_TYPE_DF); - brw_inst_set_3src_dst_type(devinfo, inst, BRW_3SRC_TYPE_DF); + brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_DF); + brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_DF); break; case BRW_REGISTER_TYPE_D: - brw_inst_set_3src_src_type(devinfo, inst, BRW_3SRC_TYPE_D); - brw_inst_set_3src_dst_type(devinfo, inst, BRW_3SRC_TYPE_D); + brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_D); + brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_D); break; case BRW_REGISTER_TYPE_UD: - brw_inst_set_3src_src_type(devinfo, inst, BRW_3SRC_TYPE_UD); - brw_inst_set_3src_dst_type(devinfo, inst, BRW_3SRC_TYPE_UD); + brw_inst_set_3src_a16_src_type(devinfo, inst, BRW_3SRC_TYPE_UD); + brw_inst_set_3src_a16_dst_type(devinfo, inst, BRW_3SRC_TYPE_UD); break; default: unreachable("not reached"); diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h index e9dad38f699..4b0414dc654 100644 --- a/src/intel/compiler/brw_inst.h +++ b/src/intel/compiler/brw_inst.h @@ -198,33 +198,33 @@ F(opcode, 6, 0) * Three-source instructions: * @{ */ -F(3src_src2_reg_nr, 125, 118) -F(3src_src2_subreg_nr, 117, 115) /* Extra discontiguous bit on CHV? */ -F(3src_src2_swizzle, 114, 107) -F(3src_src2_rep_ctrl, 106, 106) -F(3src_src1_reg_nr, 104, 97) -F(3src_src1_subreg_nr, 96, 94) /* Extra discontiguous bit on CHV? */ -F(3src_src1_swizzle, 93, 86) -F(3src_src1_rep_ctrl, 85, 85) -F(3src_src0_reg_nr, 83, 76) -F(3src_src0_subreg_nr, 75, 73) /* Extra discontiguous bit on CHV? */ -F(3src_src0_swizzle, 72, 65) -F(3src_src0_rep_ctrl, 64, 64) -F(3src_dst_reg_nr, 63, 56) -F(3src_dst_subreg_nr, 55, 53) -F(3src_dst_writemask, 52, 49) -F8(3src_nib_ctrl, 47, 47, 11, 11) /* only exists on IVB+ */ -F8(3src_dst_type, 45, 44, 48, 46) /* only exists on IVB+ */ -F8(3src_src_type, 43, 42, 45, 43) -F8(3src_src2_negate, 41, 41, 42, 42) -F8(3src_src2_abs, 40, 40, 41, 41) -F8(3src_src1_negate, 39, 39, 40, 40) -F8(3src_src1_abs, 38, 38, 39, 39) -F8(3src_src0_negate, 37, 37, 38, 38) -F8(3src_src0_abs, 36, 36, 37, 37) -F8(3src_flag_reg_nr, 34, 34, 33, 33) -F8(3src_flag_subreg_nr, 33, 33, 32, 32) -FF(3src_dst_reg_file, +F(3src_src2_reg_nr, 125, 118) /* same in align1 */ +F(3src_a16_src2_subreg_nr, 117, 115) /* Extra discontiguous bit on CHV? */ +F(3src_a16_src2_swizzle, 114, 107) +F(3src_a16_src2_rep_ctrl, 106, 106) +F(3src_src1_reg_nr, 104, 97) /* same in align1 */ +F(3src_a16_src1_subreg_nr, 96, 94) /* Extra discontiguous bit on CHV? */ +F(3src_a16_src1_swizzle, 93, 86) +F(3src_a16_src1_rep_ctrl, 85, 85) +F(3src_src0_reg_nr, 83, 76) /* same in align1 */ +F(3src_a16_src0_subreg_nr, 75, 73) /* Extra discontiguous bit on CHV? */ +F(3src_a16_src0_swizzle, 72, 65) +F(3src_a16_src0_rep_ctrl, 64, 64) +F(3src_dst_reg_nr, 63, 56) /* same in align1 */ +F(3src_a16_dst_subreg_nr, 55, 53) +F(3src_a16_dst_writemask, 52, 49) +F8(3src_a16_nib_ctrl, 47, 47, 11, 11) /* only exists on IVB+ */ +F8(3src_a16_dst_type, 45, 44, 48, 46) /* only exists on IVB+ */ +F8(3src_a16_src_type, 43, 42, 45, 43) +F8(3src_src2_negate, 41, 41, 42, 42) +F8(3src_src2_abs, 40, 40, 41, 41) +F8(3src_src1_negate, 39, 39, 40, 40) +F8(3src_src1_abs, 38, 38, 39, 39) +F8(3src_src0_negate, 37, 37, 38, 38) +F8(3src_src0_abs, 36, 36, 37, 37) +F8(3src_a16_flag_reg_nr, 34, 34, 33, 33) +F8(3src_a16_flag_subreg_nr, 33, 33, 32, 32) +FF(3src_a16_dst_reg_file, /* 4-5: doesn't exist - no 3-source instructions */ -1, -1, -1, -1, -1, -1, /* 6: */ 32, 32, /* 7-8: doesn't exist - no MRFs */ -1, -1, -1, -1)