From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 16 Jul 2019 06:15:57 +0000 (+0100)
Subject: add full coverage fcvt up 16 to 32 test
X-Git-Tag: ls180-24jan2020~833
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e7f891e4576d0d3ae16e9064d4cdb2871ca1a3dc;p=ieee754fpu.git

add full coverage fcvt up 16 to 32 test
---

diff --git a/src/ieee754/fcvt/test/test_fcvt_up_pipe_16_32.py b/src/ieee754/fcvt/test/test_fcvt_up_pipe_16_32.py
new file mode 100644
index 00000000..1da1f795
--- /dev/null
+++ b/src/ieee754/fcvt/test/test_fcvt_up_pipe_16_32.py
@@ -0,0 +1,21 @@
+""" test of FPCVTMuxInOut
+"""
+
+from ieee754.fcvt.pipeline import (FPCVTUpMuxInOut,)
+from ieee754.fpcommon.test.case_gen import run_pipe_fp
+from ieee754.fpcommon.test import unit_test_half
+from ieee754.fcvt.test.up_fcvt_data_16_32 import regressions
+
+from sfpy import Float32, Float16
+
+def fcvt_32(x):
+    return Float32(x)
+
+def test_pipe_fp16_32():
+    dut = FPCVTUpMuxInOut(16, 32, 4)
+    run_pipe_fp(dut, 16, "upfcvt", unit_test_half, Float16,
+                regressions, fcvt_32, 10, True)
+
+if __name__ == '__main__':
+    test_pipe_fp16_32()
+
diff --git a/src/ieee754/fcvt/test/up_fcvt_data_16_32.py b/src/ieee754/fcvt/test/up_fcvt_data_16_32.py
new file mode 100644
index 00000000..24abc340
--- /dev/null
+++ b/src/ieee754/fcvt/test/up_fcvt_data_16_32.py
@@ -0,0 +1,3 @@
+def regressions():
+    yield 0x7e83,
+    yield 0xaf47,