From: Luke Kenneth Casson Leighton Date: Mon, 3 Apr 2023 14:20:14 +0000 (+0100) Subject: clarify X-Git-Tag: opf_rfc_ls012_v1~151 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e81aa81dd687ed0729ff4ea52f15f08e38ccd8a0;p=libreriscv.git clarify --- diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index 1a3e8676c..42bf34158 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -238,6 +238,8 @@ be as follows. For clarity in the table below: * Both MSB0-ordered bitnumbering *and* LSB-ordered bitnumbering are shown * The GPR-numbering is considered LSB0-ordered * The Element-numbering (result0-result4) is LSB0-ordered +* Each of the results (result0-result4) are 16-bit +* "same" indicates "no change as a result of the Vectorised add" ``` | MSB0: | 0:15 | 16:31 | 32:47 | 48:63 |