From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Tue, 8 Oct 2019 16:16:59 +0000 (+0100)
Subject: arch-arm: Make the Tarmac parsed registers case insensitive
X-Git-Tag: v19.0.0.0~262
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e82a6f32cb3432566bbe9f00bc93e3b14f8db998;p=gem5.git

arch-arm: Make the Tarmac parsed registers case insensitive

This will make parsing more robust, considering the tarmac
format changes between AA32 and AA64.

Change-Id: I0e4905d70e2e494104706a4c6c75b8169deaecf9
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22845
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/arch/arm/tracers/tarmac_parser.cc b/src/arch/arm/tracers/tarmac_parser.cc
index 1495c7a74..cade9d3b3 100644
--- a/src/arch/arm/tracers/tarmac_parser.cc
+++ b/src/arch/arm/tracers/tarmac_parser.cc
@@ -1038,7 +1038,7 @@ TarmacParserRecord::advanceTrace()
         regRecord.values.clear();
         trace >> buf;
         strcpy(regRecord.repr, buf);
-        if (buf[0] == 'r' && isdigit(buf[1])) {
+        if (std::tolower(buf[0]) == 'r' && isdigit(buf[1])) {
             // R register
             regRecord.type = REG_R;
             int base_index = atoi(&buf[1]);
@@ -1064,28 +1064,27 @@ TarmacParserRecord::advanceTrace()
                 else if (strncmp(pch, "hyp", 3) == 0)
                     regRecord.index = INTREG_HYP(base_index);
             }
-        // A64 register names are capitalized in AEM TARMAC, unlike A32
-        } else if (buf[0] == 'X' && isdigit(buf[1])) {
+        } else if (std::tolower(buf[0]) == 'x' && isdigit(buf[1])) {
             // X register (A64)
             regRecord.type = REG_X;
             regRecord.index = atoi(&buf[1]);
-        } else if (buf[0] == 's' && isdigit(buf[1])) {
+        } else if (std::tolower(buf[0]) == 's' && isdigit(buf[1])) {
             // S register
             regRecord.type = REG_S;
             regRecord.index = atoi(&buf[1]);
-        } else if (buf[0] == 'd' && isdigit(buf[1])) {
+        } else if (std::tolower(buf[0]) == 'd' && isdigit(buf[1])) {
             // D register
             regRecord.type = REG_D;
             regRecord.index = atoi(&buf[1]);
-        } else if (buf[0] == 'q' && isdigit(buf[1])) {
+        } else if (std::tolower(buf[0]) == 'q' && isdigit(buf[1])) {
             // Q register
             regRecord.type = REG_Q;
             regRecord.index = atoi(&buf[1]);
-        } else if (buf[0] == 'z' && isdigit(buf[1])) {
+        } else if (std::tolower(buf[0]) == 'z' && isdigit(buf[1])) {
             // Z (SVE vector) register
             regRecord.type = REG_Z;
             regRecord.index = atoi(&buf[1]);
-        } else if (buf[0] == 'p' && isdigit(buf[1])) {
+        } else if (std::tolower(buf[0]) == 'p' && isdigit(buf[1])) {
             // P (SVE predicate) register
             regRecord.type = REG_P;
             regRecord.index = atoi(&buf[1]);