From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 17 Dec 2019 08:03:03 +0000 (-0800)
Subject: Do not sigmap
X-Git-Tag: working-ls180~881^2^2~73
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e82a9bc642782ea84d46ca135d2c0b6a42b9e772;p=yosys.git

Do not sigmap
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index 6ca24bd7e..8db166fc2 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -191,7 +191,7 @@ struct XAigerWriter
 				}
 
 				if (wire->port_input && wire->port_output)
-					inout_bits.insert(bit);
+					inout_bits.insert(wirebit);
 			}
 
 		// TODO: Speed up toposort -- ultimately we care about