From: Andrew Burgess Date: Mon, 3 Oct 2022 09:59:57 +0000 (+0100) Subject: opcodes/riscv: style csr names as registers X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e840e61cacd49836b0bdf692bb2ff7f66f969765;p=binutils-gdb.git opcodes/riscv: style csr names as registers While reviewing another patch I noticed that RISC-V CSR names are given the text style, not the register style. This patch fixes this mistake. --- diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c index 6ac69490b78..031c19334fa 100644 --- a/opcodes/riscv-dis.c +++ b/opcodes/riscv-dis.c @@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info } if (riscv_csr_hash[csr] != NULL) - print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]); + print (info->stream, dis_style_register, "%s", + riscv_csr_hash[csr]); else print (info->stream, dis_style_text, "0x%x", csr); break;