From: Clifford Wolf <clifford@clifford.at>
Date: Mon, 14 Oct 2019 03:24:31 +0000 (+0200)
Subject: Use "(id)" instead of "id" for types as temporary hack
X-Git-Tag: working-ls180~995^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e84cedfae4211244da45ef51a84213874579117e;p=yosys.git

Use "(id)" instead of "id" for types as temporary hack

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---

e84cedfae4211244da45ef51a84213874579117e
diff --cc frontends/verilog/verilog_parser.y
index 4afd72b73,0024d4778..77f6d2051
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@@ -154,8 -158,8 +154,8 @@@ struct specify_rise_fall 
  %token TOK_INCREMENT TOK_DECREMENT TOK_UNIQUE TOK_PRIORITY
  
  %type <ast> range range_or_multirange  non_opt_range non_opt_multirange range_or_signed_int
 -%type <ast> wire_type wire_type_io expr basic_expr concat_list rvalue lvalue lvalue_concat_list
 -%type <string> opt_label opt_sva_label tok_prim_wrapper hierarchical_id
 +%type <ast> wire_type expr basic_expr concat_list rvalue lvalue lvalue_concat_list
- %type <string> opt_label opt_sva_label tok_prim_wrapper hierarchical_id
++%type <string> opt_label opt_sva_label tok_prim_wrapper hierarchical_id hierarchical_type_id
  %type <boolean> opt_signed opt_property unique_case_attr
  %type <al> attr case_attr
  
@@@ -290,6 -295,6 +291,9 @@@ hierarchical_id
  		$$ = $1;
  	};
  
++hierarchical_type_id:
++	'(' hierarchical_id ')' { $$ = $2; };
++
  module:
  	attr TOK_MODULE TOK_ID {
  		do_not_require_port_stubs = false;
@@@ -324,13 -329,13 +328,13 @@@ single_module_para
  		astbuf1 = new AstNode(AST_PARAMETER);
  		astbuf1->children.push_back(AstNode::mkconst_int(0, true));
  		append_attr(astbuf1, $1);
- 	} param_signed param_integer param_range single_param_decl |
 -	} int_param_type single_param_decl |
++	} param_type single_param_decl |
  	attr TOK_LOCALPARAM {
  		if (astbuf1) delete astbuf1;
  		astbuf1 = new AstNode(AST_LOCALPARAM);
  		astbuf1->children.push_back(AstNode::mkconst_int(0, true));
  		append_attr(astbuf1, $1);
- 	} param_signed param_integer param_range single_param_decl |
 -	} int_param_type single_param_decl |
++	} param_type single_param_decl |
  	single_param_decl;
  
  module_args_opt:
@@@ -474,9 -480,18 +479,15 @@@ wire_type
  		$$ = astbuf3;
  	};
  
 -wire_type_io:
 -	{
 -		astbuf3 = new AstNode(AST_WIRE);
 -		current_wire_rand = false;
 -		current_wire_const = false;
 -	} io_wire_type_token_list delay {
 -		$$ = astbuf3;
 -	};
 -
  wire_type_token_list:
--	wire_type_token | wire_type_token_list wire_type_token |
--	wire_type_token_io ;
++	wire_type_token |
++	wire_type_token_list wire_type_token |
++	wire_type_token_io |
++	hierarchical_type_id {
++		astbuf3->is_custom_type = true;
++		astbuf3->children.push_back(new AstNode(AST_WIRETYPE));
++		astbuf3->children.back()->str = *$1;
++	};
  
  wire_type_token_io:
  	TOK_INPUT {
@@@ -591,7 -617,7 +602,7 @@@ module_body
  	/* empty */;
  
  module_body_stmt:
- 	task_func_decl | specify_block |param_decl | localparam_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt |
 -	task_func_decl | specify_block |param_decl | localparam_decl | typedef_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt |
++	task_func_decl | specify_block | param_decl | localparam_decl | typedef_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt |
  	always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block;
  
  checker_decl:
@@@ -1149,6 -1175,19 +1160,14 @@@ param_range
  		}
  	};
  
 -custom_param_type:
 -	hierarchical_id {
++param_type:
++	param_signed param_integer param_real param_range |
++	hierarchical_type_id {
+ 		astbuf1->is_custom_type = true;
+ 		astbuf1->children.push_back(new AstNode(AST_WIRETYPE));
+ 		astbuf1->children.back()->str = *$1;
+ 	};
+ 
 -param_type:
 -	param_signed param_integer param_real param_range | custom_param_type;
 -
 -int_param_type:
 -	param_signed param_integer param_range | custom_param_type;
 -
  param_decl:
  	attr TOK_PARAMETER {
  		astbuf1 = new AstNode(AST_PARAMETER);
@@@ -1163,7 -1202,7 +1182,7 @@@ localparam_decl
  		astbuf1 = new AstNode(AST_LOCALPARAM);
  		astbuf1->children.push_back(AstNode::mkconst_int(0, true));
  		append_attr(astbuf1, $1);
- 	} param_signed param_integer param_real param_range param_decl_list ';' {
 -	}  param_type param_decl_list ';' {
++	} param_type param_decl_list ';' {
  		delete astbuf1;
  	};
  
diff --cc tests/svtypes/typedef_memory.sv
index 000000000,37e63c1d0..577e484ad
mode 000000,100644..100644
--- a/tests/svtypes/typedef_memory.sv
+++ b/tests/svtypes/typedef_memory.sv
@@@ -1,0 -1,10 +1,10 @@@
+ module top(input [3:0] addr, wdata, input clk, wen, output reg [3:0] rdata);
+ 	typedef logic [3:0] ram16x4_t[0:15];
+ 
 -	ram16x4_t mem;
++	(ram16x4_t) mem;
+ 
+ 	always @(posedge clk) begin
+ 		if (wen) mem[addr] <= wdata;
+ 		rdata <= mem[addr];
+ 	end
+ endmodule
diff --cc tests/svtypes/typedef_memory.ys
index 000000000,d0b8cf5bf..93cf47bbe
mode 000000,100644..100644
--- a/tests/svtypes/typedef_memory.ys
+++ b/tests/svtypes/typedef_memory.ys
@@@ -1,0 -1,3 +1,3 @@@
 -read -sv typedef_memory.sv
++read_verilog -sv typedef_memory.sv
+ prep -top top
+ select -assert-count 1 t:$mem r:SIZE=16 %i r:WIDTH=4 %i
diff --cc tests/svtypes/typedef_memory_2.sv
index 000000000,6d65131db..f3089bf55
mode 000000,100644..100644
--- a/tests/svtypes/typedef_memory_2.sv
+++ b/tests/svtypes/typedef_memory_2.sv
@@@ -1,0 -1,10 +1,10 @@@
+ module top(input [3:0] addr, wdata, input clk, wen, output reg [3:0] rdata);
+ 	typedef logic [3:0] nibble;
+ 
 -	nibble mem[0:15];
++	(nibble) mem[0:15];
+ 
+ 	always @(posedge clk) begin
+ 		if (wen) mem[addr] <= wdata;
+ 		rdata <= mem[addr];
+ 	end
+ endmodule
diff --cc tests/svtypes/typedef_memory_2.ys
index 000000000,0997beeea..854e554f3
mode 000000,100644..100644
--- a/tests/svtypes/typedef_memory_2.ys
+++ b/tests/svtypes/typedef_memory_2.ys
@@@ -1,0 -1,4 +1,4 @@@
 -read -sv typedef_memory_2.sv
++read_verilog -sv typedef_memory_2.sv
+ prep -top top
+ dump
+ select -assert-count 1 t:$mem r:SIZE=16 %i r:WIDTH=4 %i
diff --cc tests/svtypes/typedef_package.sv
index 000000000,bee88b7ae..a1e16d4b1
mode 000000,100644..100644
--- a/tests/svtypes/typedef_package.sv
+++ b/tests/svtypes/typedef_package.sv
@@@ -1,0 -1,11 +1,11 @@@
+ package pkg;
+ 	typedef logic [7:0] uint8_t;
+ endpackage
+ 
+ module top;
+ 
 -	(* keep *) pkg::uint8_t a = 8'hAA;
++	(* keep *) (pkg::uint8_t) a = 8'hAA;
+ 
+ 	always @* assert(a == 8'hAA);
+ 
+ endmodule
diff --cc tests/svtypes/typedef_param.sv
index 000000000,d838dd828..ddbd471e0
mode 000000,100644..100644
--- a/tests/svtypes/typedef_param.sv
+++ b/tests/svtypes/typedef_param.sv
@@@ -1,0 -1,22 +1,22 @@@
+ `define STRINGIFY(x) `"x`"
+ `define STATIC_ASSERT(x) if(!(x)) $error({"assert failed: ", `STRINGIFY(x)})
+ 
+ module top;
+ 
+ 	typedef logic [1:0] uint2_t;
+ 	typedef logic signed [3:0] int4_t;
+ 	typedef logic signed [7:0] int8_t;
 -	typedef int8_t char_t;
++	typedef (int8_t) char_t;
+ 
 -	parameter uint2_t int2 = 2'b10;
 -	localparam int4_t int4 = -1;
 -	localparam int8_t int8 = int4;
 -	localparam char_t ch = int8;
++	parameter (uint2_t) int2 = 2'b10;
++	localparam (int4_t) int4 = -1;
++	localparam (int8_t) int8 = int4;
++	localparam (char_t) ch = int8;
+ 
+ 
+ 	`STATIC_ASSERT(int2 == 2'b10);
+ 	`STATIC_ASSERT(int4 == 4'b1111);
+ 	`STATIC_ASSERT(int8 == 8'b11111111);
+ 	`STATIC_ASSERT(ch   == 8'b11111111);
+ 
+ endmodule
diff --cc tests/svtypes/typedef_scopes.sv
index 000000000,340defbbb..faa385bd6
mode 000000,100644..100644
--- a/tests/svtypes/typedef_scopes.sv
+++ b/tests/svtypes/typedef_scopes.sv
@@@ -1,0 -1,23 +1,23 @@@
+ 
+ typedef logic [3:0] outer_uint4_t;
+ 
+ module top;
+ 
 -	outer_uint4_t u4_i = 8'hA5;
++	(outer_uint4_t) u4_i = 8'hA5;
+ 	always @(*) assert(u4_i == 4'h5);
+ 
+ 	typedef logic [3:0] inner_type;
 -	inner_type inner_i1 = 8'h5A;
++	(inner_type) inner_i1 = 8'h5A;
+ 	always @(*) assert(inner_i1 == 4'hA);
+ 
+ 	if (1) begin: genblock
+ 		typedef logic [7:0] inner_type;
 -		inner_type inner_gb_i = 8'hA5;
++		(inner_type) inner_gb_i = 8'hA5;
+ 		always @(*) assert(inner_gb_i == 8'hA5);
+ 	end
+ 
 -	inner_type inner_i2 = 8'h42;
++	(inner_type) inner_i2 = 8'h42;
+ 	always @(*) assert(inner_i2 == 4'h2);
+ 
+ 
+ endmodule
diff --cc tests/svtypes/typedef_simple.sv
index 000000000,8f89910e5..7e760dee4
mode 000000,100644..100644
--- a/tests/svtypes/typedef_simple.sv
+++ b/tests/svtypes/typedef_simple.sv
@@@ -1,0 -1,19 +1,19 @@@
+ module top;
+ 
+ 	typedef logic [1:0] uint2_t;
+ 	typedef logic signed [3:0] int4_t;
+ 	typedef logic signed [7:0] int8_t;
 -	typedef int8_t char_t;
++	typedef (int8_t) char_t;
+ 
 -	(* keep *) uint2_t int2 = 2'b10;
 -	(* keep *) int4_t int4 = -1;
 -	(* keep *) int8_t int8 = int4;
 -	(* keep *) char_t ch = int8;
++	(* keep *) (uint2_t) int2 = 2'b10;
++	(* keep *) (int4_t) int4 = -1;
++	(* keep *) (int8_t) int8 = int4;
++	(* keep *) (char_t) ch = int8;
+ 
+ 
+ 	always @* assert(int2 == 2'b10);
+ 	always @* assert(int4 == 4'b1111);
+ 	always @* assert(int8 == 8'b11111111);
+ 	always @* assert(ch   == 8'b11111111);
+ 
+ endmodule