From: Jakub Jelinek Date: Fri, 30 Jun 2017 14:52:24 +0000 (+0200) Subject: re PR target/81225 (ICE with -mavx512ifma -O3 -ffloat-store) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e855bdc04db3b2ff010d6d490dc9a4bee5f08b3b;p=gcc.git re PR target/81225 (ICE with -mavx512ifma -O3 -ffloat-store) PR target/81225 * config/i386/sse.md (vec_extract_lo_): For V8FI, V16FI and VI8F_256 iterators, use instead of nonimmediate_operand and instead of m for the input operand. For V8FI iterator, always split if input is a MEM. For V16FI and V8SF_256 iterators, don't test if both operands are MEM if . For VI4F_256 iterator, use instead of register_operand and instead of v for the input operand. Make sure both operands aren't MEMs for if not . * gcc.target/i386/pr81225.c: New test. From-SVN: r249844 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 84a93992292..be0b4bc98de 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2017-06-30 Jakub Jelinek + + PR target/81225 + * config/i386/sse.md (vec_extract_lo_): For + V8FI, V16FI and VI8F_256 iterators, use instead + of nonimmediate_operand and instead of m for + the input operand. For V8FI iterator, always split if input is a MEM. + For V16FI and V8SF_256 iterators, don't test if both operands are MEM + if . For VI4F_256 iterator, use + instead of register_operand and instead of v for + the input operand. Make sure both operands aren't MEMs for if not + . + 2017-06-30 Sylvestre Ledru * lto-wrapper.c (copy_file) Close both file descriptors before diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f61ae2bb927..5cf6c928bfb 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -7359,13 +7359,13 @@ (define_insn "vec_extract_lo_" [(set (match_operand: 0 "" "=,v") (vec_select: - (match_operand:V8FI 1 "nonimmediate_operand" "v,m") + (match_operand:V8FI 1 "" "v,") (parallel [(const_int 0) (const_int 1) (const_int 2) (const_int 3)])))] "TARGET_AVX512F && ( || !(MEM_P (operands[0]) && MEM_P (operands[1])))" { - if ( || !TARGET_AVX512VL) + if ( || (!TARGET_AVX512VL && !MEM_P (operands[1]))) return "vextract64x4\t{$0x0, %1, %0|%0, %1, 0x0}"; else return "#"; @@ -7515,14 +7515,15 @@ (define_insn "vec_extract_lo_" [(set (match_operand: 0 "nonimmediate_operand" "=v,m") (vec_select: - (match_operand:V16FI 1 "nonimmediate_operand" "vm,v") + (match_operand:V16FI 1 "" + ",v") (parallel [(const_int 0) (const_int 1) (const_int 2) (const_int 3) (const_int 4) (const_int 5) (const_int 6) (const_int 7)])))] "TARGET_AVX512F && - && !(MEM_P (operands[0]) && MEM_P (operands[1]))" + && ( || !(MEM_P (operands[0]) && MEM_P (operands[1])))" { if () return "vextract32x8\t{$0x0, %1, %0|%0, %1, 0x0}"; @@ -7546,11 +7547,12 @@ (define_insn "vec_extract_lo_" [(set (match_operand: 0 "" "=v,m") (vec_select: - (match_operand:VI8F_256 1 "nonimmediate_operand" "vm,v") + (match_operand:VI8F_256 1 "" + ",v") (parallel [(const_int 0) (const_int 1)])))] "TARGET_AVX && && - && !(MEM_P (operands[0]) && MEM_P (operands[1]))" + && ( || !(MEM_P (operands[0]) && MEM_P (operands[1])))" { if () return "vextract64x2\t{$0x0, %1, %0%{%3%}|%0%{%3%}, %1, 0x0}"; @@ -7610,12 +7612,16 @@ "operands[1] = gen_lowpart (mode, operands[1]);") (define_insn "vec_extract_lo_" - [(set (match_operand: 0 "" "=") + [(set (match_operand: 0 "" + "=,v") (vec_select: - (match_operand:VI4F_256 1 "register_operand" "v") + (match_operand:VI4F_256 1 "" + "v,") (parallel [(const_int 0) (const_int 1) (const_int 2) (const_int 3)])))] - "TARGET_AVX && && " + "TARGET_AVX + && && + && ( || !(MEM_P (operands[0]) && MEM_P (operands[1])))" { if () return "vextract32x4\t{$0x0, %1, %0|%0, %1, 0x0}"; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2637ecc6262..f42ea73f704 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-06-30 Jakub Jelinek + + PR target/81225 + * gcc.target/i386/pr81225.c: New test. + 2017-06-30 Nathan Sidwell * g++.dg/concepts/memfun-err.C: Adjust diagnostics. diff --git a/gcc/testsuite/gcc.target/i386/pr81225.c b/gcc/testsuite/gcc.target/i386/pr81225.c new file mode 100644 index 00000000000..db95e941c14 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr81225.c @@ -0,0 +1,14 @@ +/* PR target/81225 */ +/* { dg-do compile } */ +/* { dg-options "-mavx512ifma -O3 -ffloat-store" } */ + +long a[24]; +float b[4], c[24]; +int d; + +void +foo () +{ + for (d = 0; d < 24; d++) + c[d] = (float) d ? : b[a[d]]; +}