From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 23 Jul 2020 21:49:32 +0000 (+0100)
Subject: syntax error
X-Git-Tag: semi_working_ecp5~596
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e8585459dbd636c86964c76483989cdaa2c2d038;p=soc.git

syntax error
---

diff --git a/libreriscv b/libreriscv
index d9407bb5..d83e5ccb 160000
--- a/libreriscv
+++ b/libreriscv
@@ -1 +1 @@
-Subproject commit d9407bb55d4da65bbecdbf51d472a76fe4a5ba16
+Subproject commit d83e5ccbacd56e762bedc660cdd930264e12b81b
diff --git a/src/soc/litex/core.py b/src/soc/litex/core.py
index c37f23a8..d391eb70 100644
--- a/src/soc/litex/core.py
+++ b/src/soc/litex/core.py
@@ -86,8 +86,8 @@ class LibreSOC(CPU):
             o_ibus__cti   = self.ibus.cti,
             o_ibus__bte   = self.ibus.bte,
             o_ibus__we    = self.ibus.we,
-            #o_ibus__adr   = self.ibus.adr, # 64-bit
-            sigh o_ibus__adr   = Cat(Signal(3), self.ibus.adr), # 64-bit
+            # sigh o_ibus__adr   = self.ibus.adr, # for 32-bit
+            o_ibus__adr   = Cat(Signal(3), self.ibus.adr), # 64-bit
             o_ibus__dat_w = self.ibus.dat_w,
             o_ibus__sel   = self.ibus.sel,
             i_ibus__ack   = self.ibus.ack,