From: Ali Saidi <saidi@eecs.umich.edu>
Date: Thu, 15 Feb 2007 20:24:08 +0000 (-0500)
Subject: fixup remote gdb support for sparc fs
X-Git-Tag: m5_2.0_beta3~192^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e8cd54e805e9db51d184bb07b104a7e807926cec;p=gem5.git

fixup remote gdb support for sparc fs

--HG--
extra : convert_revision : 5edf0ad492fe438d66bcf0ae469ef841cd71e157
---

diff --git a/src/arch/sparc/remote_gdb.cc b/src/arch/sparc/remote_gdb.cc
index 21c4a468c..2221576a3 100644
--- a/src/arch/sparc/remote_gdb.cc
+++ b/src/arch/sparc/remote_gdb.cc
@@ -138,7 +138,7 @@ using namespace std;
 using namespace TheISA;
 
 RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
-    : BaseRemoteGDB(_system, c, NumGDBRegs)
+    : BaseRemoteGDB(_system, c, NumGDBRegs), nextBkpt(0)
 {}
 
 ///////////////////////////////////////////////////////////
@@ -165,10 +165,27 @@ RemoteGDB::getregs()
 {
     memset(gdbregs.regs, 0, gdbregs.size);
 
-    gdbregs.regs[RegPc] = context->readPC();
-    gdbregs.regs[RegNpc] = context->readNextPC();
+    if (context->readMiscRegWithEffect(MISCREG_PSTATE) &
+           PSTATE::am)
+        panic("In 32bit mode\n");
+
+    gdbregs.regs[RegPc] = htobe(context->readPC());
+    gdbregs.regs[RegNpc] = htobe(context->readNextPC());
     for(int x = RegG0; x <= RegI0 + 7; x++)
-        gdbregs.regs[x] = context->readIntReg(x - RegG0);
+        gdbregs.regs[x] = htobe(context->readIntReg(x - RegG0));
+
+    gdbregs.regs[RegFsr] = htobe(context->readMiscRegWithEffect(MISCREG_FSR));
+    gdbregs.regs[RegFprs] = htobe(context->readMiscRegWithEffect(MISCREG_FPRS));
+    gdbregs.regs[RegY] = htobe(context->readIntReg(NumIntArchRegs + 1));
+    gdbregs.regs[RegState] = htobe(
+        context->readMiscRegWithEffect(MISCREG_CWP) |
+        context->readMiscRegWithEffect(MISCREG_PSTATE) << 8 |
+        context->readMiscRegWithEffect(MISCREG_ASI) << 24 |
+        context->readIntReg(NumIntArchRegs + 2) << 32);
+
+
+    DPRINTF(GDBRead, "PC=%#x\n", gdbregs.regs[RegPc]);
+
     //Floating point registers are left at 0 in netbsd
     //All registers other than the pc, npc and int regs
     //are ignored as well.
@@ -193,12 +210,13 @@ RemoteGDB::setregs()
 void
 RemoteGDB::clearSingleStep()
 {
-    warn("SPARC single stepping not implemented, "
-            "but clearSingleStep called\n");
+   if (nextBkpt)
+       clearTempBreakpoint(nextBkpt);
 }
 
 void
 RemoteGDB::setSingleStep()
 {
-    panic("SPARC single stepping not implemented.\n");
+    nextBkpt = context->readNextPC();
+    setTempBreakpoint(nextBkpt);
 }
diff --git a/src/arch/sparc/remote_gdb.hh b/src/arch/sparc/remote_gdb.hh
index e4b66b783..17ad7a8e6 100644
--- a/src/arch/sparc/remote_gdb.hh
+++ b/src/arch/sparc/remote_gdb.hh
@@ -50,14 +50,9 @@ namespace SparcISA
         enum RegisterConstants
         {
             RegG0 = 0, RegO0 = 8, RegL0 = 16, RegI0 = 24,
-            RegF0 = 32, RegF32 = 64,
-            RegPc = 80, RegNpc, RegCcr, RegFsr, RegFprs, RegY, RegAsi,
-            RegVer, RegTick, RegPil, RegPstate,
-            RegTstate, RegTba, RegTl, RegTt, RegTpc, RegTnpc, RegWstate,
-            RegCwp, RegCansave, RegCanrestore, RegCleanwin, RegOtherwin,
-            RegAsr16 = 103,
-            RegIcc = 119, RegXcc,
-            RegFcc0 = 121,
+            RegF0 = 32,
+            RegPc = 64, RegNpc, RegState, RegFsr, RegFprs, RegY,
+            /*RegState contains data in same format as tstate */
             NumGDBRegs
         };
 
@@ -72,6 +67,8 @@ namespace SparcISA
 
         void clearSingleStep();
         void setSingleStep();
+
+        Addr nextBkpt;
     };
 }