From: Luke Kenneth Casson Leighton Date: Sun, 5 Jul 2020 11:22:28 +0000 (+0100) Subject: comment out SPR for now, needs SPR regfile X-Git-Tag: div_pipeline~162^2~68 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e8d1d1b04f4c3fddb6dce882642304026b8196fb;p=soc.git comment out SPR for now, needs SPR regfile --- diff --git a/src/soc/fu/compunits/compunits.py b/src/soc/fu/compunits/compunits.py index 73cc249f..3f2d20bf 100644 --- a/src/soc/fu/compunits/compunits.py +++ b/src/soc/fu/compunits/compunits.py @@ -192,7 +192,8 @@ class AllFunctionUnits(Elaboratable): units = pspec.units if not isinstance(units, dict): units = {'alu': 1, 'cr': 1, 'branch': 1, 'trap': 1, - 'spr': 1, 'logical': 1, + #'spr': 1, TODO: spr regfile + 'logical': 1, 'div': 1, 'shiftrot': 1} alus = {'alu': ALUFunctionUnit, 'cr': CRFunctionUnit,