From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 22 May 2020 10:15:17 +0000 (+0100)
Subject: remove unneeded code
X-Git-Tag: div_pipeline~947
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e8d409f66ff9727ee5af1d28c6c2ac7c265b9450;p=soc.git

remove unneeded code
---

diff --git a/src/soc/fu/shift_rot/test/test_pipe_caller.py b/src/soc/fu/shift_rot/test/test_pipe_caller.py
index 713ebd61..bddda219 100644
--- a/src/soc/fu/shift_rot/test/test_pipe_caller.py
+++ b/src/soc/fu/shift_rot/test/test_pipe_caller.py
@@ -24,13 +24,6 @@ class TestCase:
         self.sprs = sprs
         self.name = name
 
-def get_rec_width(rec):
-    recwidth = 0
-    # Setup random inputs for dut.op
-    for p in rec.ports():
-        width = p.width
-        recwidth += width
-    return recwidth
 
 def set_alu_inputs(alu, dec2, sim):
     inputs = []
@@ -260,6 +253,7 @@ class TestRunner(FHDLTestCase):
         with sim.write_vcd("simulator.vcd", "simulator.gtkw",
                             traces=[]):
             sim.run()
+
     def check_extra_alu_outputs(self, alu, dec2, sim):
         rc = yield dec2.e.rc.data
         if rc: