From: Clifford Wolf Date: Sun, 7 Jul 2013 14:49:30 +0000 (+0200) Subject: Fixed another bug found using vloghammer X-Git-Tag: yosys-0.2.0~542 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e8da3ea7b647f2c1eeba8a84590df7b05ca4e046;p=yosys.git Fixed another bug found using vloghammer --- diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 03bb8a430..f9f5c6f88 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -798,7 +798,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint) if (0) { case AST_SHIFT_SLEFT: type_name = "$sshl"; is_signed = true; } if (0) { case AST_SHIFT_SRIGHT: type_name = "$sshr"; is_signed = true; } { - RTLIL::SigSpec left = children[0]->genRTLIL(width_hint); + RTLIL::SigSpec left = children[0]->genRTLIL(); RTLIL::SigSpec right = children[1]->genRTLIL(width_hint); int width = width_hint > 0 ? width_hint : left.width; return binop2rtlil(this, type_name, width, left, right); diff --git a/tests/simple/vloghammer.v b/tests/simple/vloghammer.v new file mode 100644 index 000000000..a0cde043a --- /dev/null +++ b/tests/simple/vloghammer.v @@ -0,0 +1,10 @@ + +// test cases found using vloghammer +// https://github.com/cliffordwolf/VlogHammer + +module test01(a, y); + input [7:0] a; + output [3:0] y; + assign y = ~a >> 4; +endmodule +