From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 9 Jun 2020 10:49:07 +0000 (+0100)
Subject: correct local variable references
X-Git-Tag: div_pipeline~456
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e90d99358fca9abb2a51c3002c95de7398dd2c18;p=soc.git

correct local variable references
---

diff --git a/src/soc/fu/trap/main_stage.py b/src/soc/fu/trap/main_stage.py
index 273b8e20..222da5dd 100644
--- a/src/soc/fu/trap/main_stage.py
+++ b/src/soc/fu/trap/main_stage.py
@@ -68,11 +68,11 @@ def msr_copy(msr_o, msr_i, zero_me=True):
     return l
 
 
-def msr_check_pr(m, msr_o):
+def msr_check_pr(m, msr):
     """msr_check_pr: checks "problem state"
     """
     comb = m.d.comb
-    with m.If(msrdata[MSR_PR]):
+    with m.If(msr[MSR_PR]):
         comb += msr[MSR_EE].eq(1) # set external interrupt bit
         comb += msr[MSR_IR].eq(1) # set instruction relocation bit
         comb += msr[MSR_DR].eq(1) # set data relocation bit