From: Vladimir Makarov Date: Thu, 10 Nov 2016 17:04:31 +0000 (+0000) Subject: target.def (additional_allocno_class_p): New. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e93f30a65fdca10d8881fe1a462eca347b5f58b2;p=gcc.git target.def (additional_allocno_class_p): New. 2016-11-10 Vladimir Makarov * target.def (additional_allocno_class_p): New. * hooks.h (hook_bool_reg_class_t_false): New prototype. * hooks.c (hook_bool_reg_class_t_false): New. * ira.c (setup_allocno_and_important_classes): Use the new hook. * doc/tm.texi.in (TARGET_ADDITIONAL_ALLOCNO_CLASS_P): Add it. * doc/tm.texi: Update. From-SVN: r242043 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a380cbf460..a87a17f1341 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-11-10 Vladimir Makarov + + * target.def (additional_allocno_class_p): New. + * hooks.h (hook_bool_reg_class_t_false): New prototype. + * hooks.c (hook_bool_reg_class_t_false): New. + * ira.c (setup_allocno_and_important_classes): Use the new hook. + * doc/tm.texi.in (TARGET_ADDITIONAL_ALLOCNO_CLASS_P): Add it. + * doc/tm.texi: Update. + 2016-11-10 Jason Merrill * gengtype.c (new_structure): Append to structures list. diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 81c63b71bff..85341aeeace 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -2899,6 +2899,10 @@ addressing. This hook defines a class of registers which could be used for spilling pseudos of the given mode and class, or @code{NO_REGS} if only memory should be used. Not defining this hook is equivalent to returning @code{NO_REGS} for all inputs. @end deftypefn +@deftypefn {Target Hook} bool TARGET_ADDITIONAL_ALLOCNO_CLASS_P (reg_class_t) +This hook should return @code{true} if given class of registers should be an allocno class in any way. Usually RA uses only one register class from all classes containing the same register set. In some complicated cases, you need to have two or more such classes as allocno ones for RA correct work. Not defining this hook is equivalent to returning @code{false} for all inputs. +@end deftypefn + @deftypefn {Target Hook} machine_mode TARGET_CSTORE_MODE (enum insn_code @var{icode}) This hook defines the machine mode to use for the boolean result of conditional store patterns. The ICODE argument is the instruction code for the cstore being performed. Not definiting this hook is the same as accepting the mode encoded into operand 0 of the cstore expander patterns. @end deftypefn diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index 74e9200f749..400d574f3fa 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -2507,6 +2507,8 @@ value that the middle-end intended. @hook TARGET_SPILL_CLASS +@hook TARGET_ADDITIONAL_ALLOCNO_CLASS_P + @hook TARGET_CSTORE_MODE @hook TARGET_COMPUTE_PRESSURE_CLASSES diff --git a/gcc/hooks.c b/gcc/hooks.c index 3995786d7c2..6fed2c506c8 100644 --- a/gcc/hooks.c +++ b/gcc/hooks.c @@ -466,3 +466,11 @@ hook_bool_uint_uintp_false (unsigned int, unsigned int *) { return false; } + +/* Generic hook that takes a register class and returns false. */ +bool +hook_bool_reg_class_t_false (reg_class_t regclass ATTRIBUTE_UNUSED) +{ + return false; +} + diff --git a/gcc/hooks.h b/gcc/hooks.h index a1d67769c44..e59b42e3a7f 100644 --- a/gcc/hooks.h +++ b/gcc/hooks.h @@ -55,6 +55,7 @@ extern bool hook_bool_rtx_insn_true (rtx_insn *); extern bool hook_bool_rtx_false (rtx); extern bool hook_bool_rtx_insn_int_false (rtx_insn *, int); extern bool hook_bool_uintp_uintp_false (unsigned int *, unsigned int *); +extern bool hook_bool_reg_class_t_false (reg_class_t regclass); extern bool hook_bool_rtx_mode_int_int_intp_bool_false (rtx, machine_mode, int, int, int *, bool); extern bool hook_bool_tree_tree_false (tree, tree); diff --git a/gcc/ira.c b/gcc/ira.c index f453ea9e604..315b8470b7f 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -1012,7 +1012,7 @@ setup_allocno_and_important_classes (void) temp_hard_regset2)) break; } - if (j >= n) + if (j >= n || targetm.additional_allocno_class_p (i)) classes[n++] = (enum reg_class) i; else if (i == GENERAL_REGS) /* Prefer general regs. For i386 example, it means that diff --git a/gcc/target.def b/gcc/target.def index bcdbc0e2452..caeeff9c22a 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -5029,6 +5029,18 @@ DEFHOOK reg_class_t, (reg_class_t, machine_mode), NULL) +/* Determine an additional allocno class. */ +DEFHOOK +(additional_allocno_class_p, + "This hook should return @code{true} if given class of registers should\ + be an allocno class in any way. Usually RA uses only one register\ + class from all classes containing the same register set. In some\ + complicated cases, you need to have two or more such classes as\ + allocno ones for RA correct work. Not defining this hook is\ + equivalent to returning @code{false} for all inputs.", + bool, (reg_class_t), + hook_bool_reg_class_t_false) + DEFHOOK (cstore_mode, "This hook defines the machine mode to use for the boolean result of\