From: lkcl <lkcl@web>
Date: Sun, 3 Jul 2022 12:30:28 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1387
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e9543a0159d2d52b0f7cf43cd4128ebe4e9e6793;p=libreriscv.git

---

diff --git a/openpower/sv/vector_isa_comparison.mdwn b/openpower/sv/vector_isa_comparison.mdwn
index 38e2548fc..f5d6dac91 100644
--- a/openpower/sv/vector_isa_comparison.mdwn
+++ b/openpower/sv/vector_isa_comparison.mdwn
@@ -63,7 +63,8 @@ SIMD ISAs used features "inspired" from Scalable Vector ISAs.
   but has no "Scaling" capability, and no Predicate masking.
   Adding Predicate Masks to the PackedSIMD VSX ISA
   would effectively double the number of PackedSIMD
-  instructions (750 becomes 1,500)
+  instructions (750 becomes 1,500) even if it were practical
+  to do so (no available 32 bit encoding space).
 * [AVX / AVX2 / AVX128 / AVX256 / AVX512](https://en.wikipedia.org/wiki/Advanced_Vector_Extensions)
   again has the word "Vector" in its name but this in no
   way makes it a Vector ISA. None of the AVX-\* family
@@ -84,6 +85,11 @@ SIMD ISAs used features "inspired" from Scalable Vector ISAs.
   going directly against the advice given on ARM's developer
   documentation.
 
+The saving grace of PackedSIMD VSX is that it did not fall to the
+seduction outlined in the sigarch "SIMD Considered Harmful" article.
+It is clear that it is expected to deploy Multi-Issue to achieve
+high performance, which is a much cleaner approach that does not
+result in ISA poisoning.
 
 # Actual 3D GPU Architectures and ISAs (all SIMD)