From: lkcl <lkcl@web>
Date: Sun, 10 Apr 2022 15:42:17 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2805
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e9773f38dc84b99aa3296d88f714a17107a55947;p=libreriscv.git

---

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index b8a9843f5..82442e36e 100644
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -144,11 +144,11 @@ in the decoder is greatly increased.
 # EXTRA Field Mapping
 
 The purpose of the 9-bit EXTRA field mapping is to mark individual
-registers (RT, RA, BFA) as either scalat or vector, and to extend
+registers (RT, RA, BFA) as either scalar or vector, and to extend
 their numbering from 0..31 in Power ISA v3.0 to 0..127 in SVP64.
 Three of the 9 bits may also be used up for a 2nd Predicate (Twin
 Predication) leaving a mere 6 bits for qualifying registers. As can
-be seen there is significant pressure on these (and all) SVP64 bits.
+be seen there is significant pressure on these (and in fact all) SVP64 bits.
 
 In Power ISA v3.1 prefixing there are bits which describe and classify
 the prefix in a fashion that is independent of the suffix. MLSS for