From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 23 Oct 2006 06:39:02 +0000 (-0400)
Subject: Don't let interupts interupt microcode at undesired points.
X-Git-Tag: m5_2.0_beta2~79
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e9908e3c854e534a391448907773ca03c60b13c8;p=gem5.git

Don't let interupts interupt microcode at undesired points.

--HG--
extra : convert_revision : a8ddc6b213b1a1b0d9c5cd194b88ac0c6bfb2a21
---

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 38a8ba097..25c478ae9 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -448,7 +448,8 @@ AtomicSimpleCPU::tick()
     for (int i = 0; i < width; ++i) {
         numCycles++;
 
-        checkForInterrupts();
+        if (!curStaticInst || !curStaticInst->isDelayedCommit())
+            checkForInterrupts();
 
         Fault fault = setupFetchRequest(ifetch_req);
 
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 97df0e5d5..fe6775ea4 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -427,7 +427,8 @@ TimingSimpleCPU::write(int32_t data, Addr addr, unsigned flags, uint64_t *res)
 void
 TimingSimpleCPU::fetch()
 {
-    checkForInterrupts();
+    if (!curStaticInst || !curStaticInst->isDelayedCommit())
+        checkForInterrupts();
 
     Request *ifetch_req = new Request();
     ifetch_req->setThreadContext(cpu_id, /* thread ID */ 0);