From: Jean THOMAS <git0@pub.jeanthomas.me>
Date: Thu, 11 Jun 2020 10:31:09 +0000 (+0200)
Subject: Fix write signal name for CSR (fixes #5)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e9a3c12741d19fe3ca614a4d8472c5443e3f95d6;p=gram.git

Fix write signal name for CSR (fixes #5)
---

diff --git a/gram/dfii.py b/gram/dfii.py
index 143fd27..f5b883f 100644
--- a/gram/dfii.py
+++ b/gram/dfii.py
@@ -54,7 +54,7 @@ class PhaseInjector(Elaboratable):
             ]
 
         with m.If(self._phase.rddata_valid):
-            m.d.sync += self._rddata.w_data.eq(self._phase.rddata)
+            m.d.sync += self._rddata.r_data.eq(self._phase.rddata)
 
         return m