From: Ilya Enkovich <ilya.enkovich@intel.com>
Date: Wed, 13 May 2015 07:49:59 +0000 (+0000)
Subject: re PR rtl-optimization/66048 ([i386] ICE in create_pre_exit when both AVX and MPX... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e9ae68afa0154895e42dbc098bc7ba63eaef7ce6;p=gcc.git

re PR rtl-optimization/66048 ([i386] ICE in create_pre_exit when both AVX and MPX are used)

gcc/

	PR target/66048
	* function.c (diddle_return_value_1): Process bounds first.
	* config/i38/i386.c (ix86_function_value_regno_p): Add bnd1
	register.

gcc/testsuite/

	PR target/66048
	* gcc.target/i386/mpx/pr66048.cc: New.

From-SVN: r223114
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5d03f432abf..35f8197d22b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2015-05-13  Ilya Enkovich  <ilya.enkovich@intel.com>
+
+	PR target/66048
+	* function.c (diddle_return_value_1): Process bounds first.
+	* config/i38/i386.c (ix86_function_value_regno_p): Add bnd1
+	register.
+
 2015-05-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	PR rtl-optimization/64616
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index fd52d891257..bda32570d54 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -8216,7 +8216,8 @@ ix86_function_value_regno_p (const unsigned int regno)
     case SI_REG:
       return TARGET_64BIT && ix86_abi != MS_ABI;
 
-    case FIRST_BND_REG:
+    case BND0_REG:
+    case BND1_REG:
       return chkp_function_instrumented_p (current_function_decl);
 
       /* Complex values are returned in %st(0)/%st(1) pair.  */
diff --git a/gcc/function.c b/gcc/function.c
index 42d5aebd418..eb90ed5752c 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -5224,8 +5224,8 @@ diddle_return_value_1 (void (*doit) (rtx, void *), void *arg, rtx outgoing)
 void
 diddle_return_value (void (*doit) (rtx, void *), void *arg)
 {
-  diddle_return_value_1 (doit, arg, crtl->return_rtx);
   diddle_return_value_1 (doit, arg, crtl->return_bnd);
+  diddle_return_value_1 (doit, arg, crtl->return_rtx);
 }
 
 static void
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0a7064872bb..2f83f4e4fca 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-05-13  Ilya Enkovich  <ilya.enkovich@intel.com>
+
+	PR target/66048
+	* gcc.target/i386/mpx/pr66048.cc: New.
+
 2015-05-13  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	PR rtl-optimization/64616
diff --git a/gcc/testsuite/gcc.target/i386/mpx/pr66048.cc b/gcc/testsuite/gcc.target/i386/mpx/pr66048.cc
new file mode 100644
index 00000000000..b29cd03ed0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/mpx/pr66048.cc
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fcheck-pointer-bounds -mmpx -march=corei7-avx" } */
+
+struct c1
+{
+  c1 (const c1 &other) : p (other.p) { };
+  int *p;
+};
+
+struct c2 : public c1 { };
+
+c1
+test (c2 a)
+{
+  return a;
+}