From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 15 May 2020 20:53:57 +0000 (+0100)
Subject: add system calls
X-Git-Tag: div_pipeline~1159
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e9fcbdcfd62d0df8b36e332c5a34281d9306b2ec;p=soc.git

add system calls
---

diff --git a/src/soc/branch/pipe_data.py b/src/soc/branch/pipe_data.py
index f3bb8f13..429de45c 100644
--- a/src/soc/branch/pipe_data.py
+++ b/src/soc/branch/pipe_data.py
@@ -30,6 +30,12 @@ class IntegerData:
     def op_bcctrl(LR, CR, CTR):
     def op_bctar(LR, CR, CTR, TAR):
     def op_bctarl(LR, CR, CTR, TAR):
+
+    def op_sc(           MSR):
+    def op_scv(LR, SRR1, MSR):
+    def op_rfscv(LR, CTR, MSR):
+    def op_rfid(SRR0, SRR1, MSR):
+    def op_hrfid(HSRR0, HSRR1, MSR):
 """
 
 class BranchInputData(IntegerData):