From: Miodrag Milanovic Date: Mon, 31 Jan 2022 12:41:02 +0000 (+0100) Subject: Compare bits when not all are defined X-Git-Tag: yosys-0.14~2^2~9 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eabd0ff11560e2d22d007a61010ac9231b413d37;p=yosys.git Compare bits when not all are defined --- diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index f08a3eb1f..34a56ff40 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -744,14 +744,28 @@ struct SimInstance if (item.second==0) continue; // Ignore signals not found Const fst_val = Const::from_string(shared->fst->valueAt(item.second, time)); Const sim_val = get_state(item.first); + if (sim_val.size()!=fst_val.size()) + log_error("Signal '%s' size is different in gold and gate.\n", log_id(item.first)); if (shared->sim_mode == SimulationMode::gate && !fst_val.is_fully_def()) { // FST data contains X - // TODO: check bit by bit + for(int i=0;isim_mode == SimulationMode::gold && !sim_val.is_fully_def()) { // sim data contains X - // TODO: check bit by bit + for(int i=0;i