From: Tobias Platen Date: Tue, 26 Jan 2021 19:27:40 +0000 (+0100) Subject: [Bug 580] redirect MMU SPRs to the MMU X-Git-Tag: convert-csv-opcode-to-binary~312 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eb30c83009e3a01162ea1de537884e0b8bf6a154;p=soc.git [Bug 580] redirect MMU SPRs to the MMU --- diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py index 32cd7332..1633d191 100644 --- a/src/soc/decoder/power_decoder2.py +++ b/src/soc/decoder/power_decoder2.py @@ -725,7 +725,25 @@ class PowerDecodeSubset(Elaboratable): # set up instruction, pick fn unit # no op: defaults to OP_ILLEGAL comb += self.do_copy("insn_type", self.op_get("internal_op")) - comb += self.do_copy("fn_unit", self.op_get("function_unit")) + + #function unit for decoded instruction + fn = self.op_get("function_unit") + spr = Signal(10, reset_less=True) + comb += spr.eq(decode_spr_num(self.dec.SPR)) # from XFX + + # for first test only forward SPR 18 to mmu + with m.If(self.dec.op.internal_op == MicrOp.OP_MTSPR): + with m.If((spr == 18) | (spr == 19)): + comb += self.do_copy("fn_unit",Function.MMU) + with m.Else(): + comb += self.do_copy("fn_unit",fn) + with m.If(self.dec.op.internal_op == MicrOp.OP_MFSPR): + with m.If((spr == 18) | (spr == 19)): + comb += self.do_copy("fn_unit",Function.MMU) + with m.Else(): + comb += self.do_copy("fn_unit",fn) + with m.Else(): + comb += self.do_copy("fn_unit",fn) # immediates if self.needs_field("zero_a", "in1_sel"):