From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 4 May 2020 17:53:06 +0000 (-0700)
Subject: verilog: fix specify src attribute
X-Git-Tag: working-ls180~572^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eb5eb60fd4af431ea38a50ad1deebcc40ad4c222;p=yosys.git

verilog: fix specify src attribute
---

diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 4a5aba79e..8ab0b8cb9 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -885,6 +885,7 @@ specify_item:
 		cell->str = stringf("$specify$%d", autoidx++);
 		cell->children.push_back(new AstNode(AST_CELLTYPE));
 		cell->children.back()->str = target->dat ? "$specify3" : "$specify2";
+		SET_AST_NODE_LOC(cell, en_expr ? @1 : @2, @10);
 
 		char oper_polarity = 0;
 		char oper_type = oper->at(0);
@@ -973,6 +974,7 @@ specify_item:
 		cell->str = stringf("$specify$%d", autoidx++);
 		cell->children.push_back(new AstNode(AST_CELLTYPE));
 		cell->children.back()->str = "$specrule";
+		SET_AST_NODE_LOC(cell, @1, @14);
 
 		cell->children.push_back(new AstNode(AST_PARASET, AstNode::mkconst_str(*$1)));
 		cell->children.back()->str = "\\TYPE";
@@ -1099,8 +1101,8 @@ specify_rise_fall:
 		$$->fall = *$4;
 		delete $2;
 		delete $4;
-        delete $6;
-        log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
+		delete $6;
+		log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
 	} |
 	'(' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ')' {
 		$$ = new specify_rise_fall;
@@ -1108,11 +1110,11 @@ specify_rise_fall:
 		$$->fall = *$4;
 		delete $2;
 		delete $4;
-        delete $6;
-        delete $8;
-        delete $10;
-        delete $12;
-        log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
+		delete $6;
+		delete $8;
+		delete $10;
+		delete $12;
+		log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
 	} |
 	'(' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ',' specify_triple ')' {
 		$$ = new specify_rise_fall;
@@ -1120,17 +1122,17 @@ specify_rise_fall:
 		$$->fall = *$4;
 		delete $2;
 		delete $4;
-        delete $6;
-        delete $8;
-        delete $10;
-        delete $12;
-        delete $14;
-        delete $16;
-        delete $18;
-        delete $20;
-        delete $22;
-        delete $24;
-        log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
+		delete $6;
+		delete $8;
+		delete $10;
+		delete $12;
+		delete $14;
+		delete $16;
+		delete $18;
+		delete $20;
+		delete $22;
+		delete $24;
+		log_file_warning(current_filename, get_line_num(), "Path delay expressions beyond rise/fall not currently supported. Ignoring.\n");
 	}
 
 specify_triple:
diff --git a/tests/various/specify.ys b/tests/various/specify.ys
index 9d55b8eb5..d7260d524 100644
--- a/tests/various/specify.ys
+++ b/tests/various/specify.ys
@@ -4,10 +4,16 @@ cd test
 select t:$specify2 -assert-count 0
 select t:$specify3 -assert-count 1
 select t:$specrule -assert-count 2
+select t:$specify3 a:src=specify.v:10.3-10.49 %i -assert-count 1
+select t:$specrule a:src=specify.v:11.3-11.36 %i -assert-count 1
+select t:$specrule a:src=specify.v:12.3-12.35 %i -assert-count 1
 cd test2
 select t:$specify2 -assert-count 2
 select t:$specify3 -assert-count 0
 select t:$specrule -assert-count 0
+select t:$specify2 a:src=specify.v:26.3-26.20 %i -assert-count 1
+                                         # ^^ Note use of macro
+select t:$specify2 a:src=specify.v:28.3-28.18 %i -assert-count 1
 cd
 write_verilog specify.out
 design -stash gold