From: Richard Guenther Date: Fri, 29 Apr 2011 14:20:41 +0000 (+0000) Subject: expr.h (expand_shift): Rename to ... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eb6c3df1a0e34edc7a243c781a1b8842e3fc285c;p=gcc.git expr.h (expand_shift): Rename to ... 2011-04-29 Richard Guenther * expr.h (expand_shift): Rename to ... (expand_variable_shift): ... this. (expand_shift): Take a constant shift amount. * expmed.c (expand_shift): Rename to ... (expand_variable_shift): ... this. (expand_shift): New wrapper around expand_variable_shift. * expr.c (convert_move, emit_group_load_1, emit_group_store, optimize_bitfield_assignment_op, store_field, expand_expr_real_2, expand_expr_real_1, reduce_to_bit_field_precision): Adjust. * expmed.c (store_fixed_bit_field, extract_bit_field_1, extract_fixed_bit_field, extract_split_bit_field, expand_mult_const, expand_mult, expand_widening_mult, expand_mult_highpart_adjust, extract_high_half, expand_sdiv_pow2, expand_divmod, emit_cstore, emit_store_flag_1, emit_store_flag): Likewise. * builtins.c (expand_builtin_signbit): Likewise. * calls.c (load_register_parameters): Likewise. * function.c (assign_parm_setup_block): Likewise. * lower-subreg.c (resolve_shift_zext): Likewise. * optabs.c (widen_bswap, expand_abs_nojump, expand_one_cmpl_abs_nojump, expand_float): Likewise. * spu/spu.c (spu_expand_extv): Likewise. * sparc/sparc.c (sparc32_initialize_trampoline): Likewise. From-SVN: r173157 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2d32ac43d5b..ce855a4b159 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,28 @@ +2011-04-29 Richard Guenther + + * expr.h (expand_shift): Rename to ... + (expand_variable_shift): ... this. + (expand_shift): Take a constant shift amount. + * expmed.c (expand_shift): Rename to ... + (expand_variable_shift): ... this. + (expand_shift): New wrapper around expand_variable_shift. + * expr.c (convert_move, emit_group_load_1, emit_group_store, + optimize_bitfield_assignment_op, store_field, expand_expr_real_2, + expand_expr_real_1, reduce_to_bit_field_precision): Adjust. + * expmed.c (store_fixed_bit_field, extract_bit_field_1, + extract_fixed_bit_field, extract_split_bit_field, expand_mult_const, + expand_mult, expand_widening_mult, expand_mult_highpart_adjust, + extract_high_half, expand_sdiv_pow2, expand_divmod, emit_cstore, + emit_store_flag_1, emit_store_flag): Likewise. + * builtins.c (expand_builtin_signbit): Likewise. + * calls.c (load_register_parameters): Likewise. + * function.c (assign_parm_setup_block): Likewise. + * lower-subreg.c (resolve_shift_zext): Likewise. + * optabs.c (widen_bswap, expand_abs_nojump, + expand_one_cmpl_abs_nojump, expand_float): Likewise. + * spu/spu.c (spu_expand_extv): Likewise. + * sparc/sparc.c (sparc32_initialize_trampoline): Likewise. + 2011-04-29 Richard Guenther * tree-inline.c (remap_eh_region_tree_nr): Use integer_type_node diff --git a/gcc/builtins.c b/gcc/builtins.c index b2534ce5850..668226daf7c 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -5423,8 +5423,7 @@ expand_builtin_signbit (tree exp, rtx target) /* Perform a logical right shift to place the signbit in the least significant bit, then truncate the result to the desired mode and mask just this bit. */ - temp = expand_shift (RSHIFT_EXPR, imode, temp, - build_int_cst (NULL_TREE, bitpos), NULL_RTX, 1); + temp = expand_shift (RSHIFT_EXPR, imode, temp, bitpos, NULL_RTX, 1); temp = gen_lowpart (rmode, temp); temp = expand_binop (rmode, and_optab, temp, const1_rtx, NULL_RTX, 1, OPTAB_LIB_WIDEN); diff --git a/gcc/calls.c b/gcc/calls.c index bd7c3a67dd5..98f3009905a 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -1668,9 +1668,7 @@ load_register_parameters (struct arg_data *args, int num_actuals, call only uses SIZE bytes at the msb end, but it doesn't seem worth generating rtl to say that. */ reg = gen_rtx_REG (word_mode, REGNO (reg)); - x = expand_shift (LSHIFT_EXPR, word_mode, reg, - build_int_cst (NULL_TREE, shift), - reg, 1); + x = expand_shift (LSHIFT_EXPR, word_mode, reg, shift, reg, 1); if (x != reg) emit_move_insn (reg, x); } @@ -1714,9 +1712,7 @@ load_register_parameters (struct arg_data *args, int num_actuals, : LSHIFT_EXPR; emit_move_insn (x, tem); - x = expand_shift (dir, word_mode, x, - build_int_cst (NULL_TREE, shift), - ri, 1); + x = expand_shift (dir, word_mode, x, shift, ri, 1); if (x != ri) emit_move_insn (ri, x); } diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 4a1795ef5ae..79802fb285d 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -7836,16 +7836,14 @@ sparc32_initialize_trampoline (rtx m_tramp, rtx fnaddr, rtx cxt) emit_move_insn (adjust_address (m_tramp, SImode, 0), expand_binop (SImode, ior_optab, - expand_shift (RSHIFT_EXPR, SImode, fnaddr, - size_int (10), 0, 1), + expand_shift (RSHIFT_EXPR, SImode, fnaddr, 10, 0, 1), GEN_INT (trunc_int_for_mode (0x03000000, SImode)), NULL_RTX, 1, OPTAB_DIRECT)); emit_move_insn (adjust_address (m_tramp, SImode, 4), expand_binop (SImode, ior_optab, - expand_shift (RSHIFT_EXPR, SImode, cxt, - size_int (10), 0, 1), + expand_shift (RSHIFT_EXPR, SImode, cxt, 10, 0, 1), GEN_INT (trunc_int_for_mode (0x05000000, SImode)), NULL_RTX, 1, OPTAB_DIRECT)); diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 3f16142e2f6..f93c14c39d5 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -748,10 +748,7 @@ spu_expand_extv (rtx ops[], int unsignedp) emit_insn (gen_rotlti3 (s0, s0, GEN_INT (start))); if (128 - width) - { - tree c = build_int_cst (NULL_TREE, 128 - width); - s0 = expand_shift (RSHIFT_EXPR, TImode, s0, c, s0, unsignedp); - } + s0 = expand_shift (RSHIFT_EXPR, TImode, s0, 128 - width, s0, unsignedp); emit_move_insn (dst, s0); } diff --git a/gcc/expmed.c b/gcc/expmed.c index 9458df3747e..7e9204d444a 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -916,7 +916,7 @@ store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset, NULL_RTX, 1, OPTAB_LIB_WIDEN); if (bitpos > 0) value = expand_shift (LSHIFT_EXPR, mode, value, - build_int_cst (NULL_TREE, bitpos), NULL_RTX, 1); + bitpos, NULL_RTX, 1); } /* Now clear the chosen bits in OP0, @@ -1396,13 +1396,9 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize, /* Signed bit field: sign-extend with two arithmetic shifts. */ target = expand_shift (LSHIFT_EXPR, mode, target, - build_int_cst (NULL_TREE, - GET_MODE_BITSIZE (mode) - bitsize), - NULL_RTX, 0); + GET_MODE_BITSIZE (mode) - bitsize, NULL_RTX, 0); return expand_shift (RSHIFT_EXPR, mode, target, - build_int_cst (NULL_TREE, - GET_MODE_BITSIZE (mode) - bitsize), - NULL_RTX, 0); + GET_MODE_BITSIZE (mode) - bitsize, NULL_RTX, 0); } /* From here on we know the desired field is smaller than a word. */ @@ -1752,12 +1748,11 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0, { /* If the field does not already start at the lsb, shift it so it does. */ - tree amount = build_int_cst (NULL_TREE, bitpos); /* Maybe propagate the target for the shift. */ /* But not if we will return it--could confuse integrate.c. */ rtx subtarget = (target != 0 && REG_P (target) ? target : 0); if (tmode != mode) subtarget = 0; - op0 = expand_shift (RSHIFT_EXPR, mode, op0, amount, subtarget, 1); + op0 = expand_shift (RSHIFT_EXPR, mode, op0, bitpos, subtarget, 1); } /* Convert the value to the desired mode. */ if (mode != tmode) @@ -1791,18 +1786,14 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0, if (GET_MODE_BITSIZE (mode) != (bitsize + bitpos)) { - tree amount - = build_int_cst (NULL_TREE, - GET_MODE_BITSIZE (mode) - (bitsize + bitpos)); + int amount = GET_MODE_BITSIZE (mode) - (bitsize + bitpos); /* Maybe propagate the target for the shift. */ rtx subtarget = (target != 0 && REG_P (target) ? target : 0); op0 = expand_shift (LSHIFT_EXPR, mode, op0, amount, subtarget, 1); } return expand_shift (RSHIFT_EXPR, mode, op0, - build_int_cst (NULL_TREE, - GET_MODE_BITSIZE (mode) - bitsize), - target, 0); + GET_MODE_BITSIZE (mode) - bitsize, target, 0); } /* Return a constant integer (CONST_INT or CONST_DOUBLE) mask value @@ -1913,15 +1904,13 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, { if (bitsize != bitsdone) part = expand_shift (LSHIFT_EXPR, word_mode, part, - build_int_cst (NULL_TREE, bitsize - bitsdone), - 0, 1); + bitsize - bitsdone, 0, 1); } else { if (bitsdone != thissize) part = expand_shift (LSHIFT_EXPR, word_mode, part, - build_int_cst (NULL_TREE, - bitsdone - thissize), 0, 1); + bitsdone - thissize, 0, 1); } if (first) @@ -1940,11 +1929,9 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, return result; /* Signed bit field: sign-extend with two arithmetic shifts. */ result = expand_shift (LSHIFT_EXPR, word_mode, result, - build_int_cst (NULL_TREE, BITS_PER_WORD - bitsize), - NULL_RTX, 0); + BITS_PER_WORD - bitsize, NULL_RTX, 0); return expand_shift (RSHIFT_EXPR, word_mode, result, - build_int_cst (NULL_TREE, BITS_PER_WORD - bitsize), - NULL_RTX, 0); + BITS_PER_WORD - bitsize, NULL_RTX, 0); } /* Try to read the low bits of SRC as an rvalue of mode MODE, preserving @@ -2053,8 +2040,8 @@ expand_dec (rtx target, rtx dec) Return the rtx for where the value is. */ rtx -expand_shift (enum tree_code code, enum machine_mode mode, rtx shifted, - tree amount, rtx target, int unsignedp) +expand_variable_shift (enum tree_code code, enum machine_mode mode, rtx shifted, + tree amount, rtx target, int unsignedp) { rtx op1, temp = 0; int left = (code == LSHIFT_EXPR || code == LROTATE_EXPR); @@ -2167,10 +2154,11 @@ expand_shift (enum tree_code code, enum machine_mode mode, rtx shifted, shifted = force_reg (mode, shifted); - temp = expand_shift (left ? LSHIFT_EXPR : RSHIFT_EXPR, - mode, shifted, new_amount, 0, 1); - temp1 = expand_shift (left ? RSHIFT_EXPR : LSHIFT_EXPR, - mode, shifted, other_amount, subtarget, 1); + temp = expand_variable_shift (left ? LSHIFT_EXPR : RSHIFT_EXPR, + mode, shifted, new_amount, 0, 1); + temp1 = expand_variable_shift (left ? RSHIFT_EXPR : LSHIFT_EXPR, + mode, shifted, other_amount, + subtarget, 1); return expand_binop (mode, ior_optab, temp, temp1, target, unsignedp, methods); } @@ -2213,6 +2201,24 @@ expand_shift (enum tree_code code, enum machine_mode mode, rtx shifted, gcc_assert (temp); return temp; } + +/* Output a shift instruction for expression code CODE, + with SHIFTED being the rtx for the value to shift, + and AMOUNT the amount to shift by. + Store the result in the rtx TARGET, if that is convenient. + If UNSIGNEDP is nonzero, do a logical shift; otherwise, arithmetic. + Return the rtx for where the value is. */ + +rtx +expand_shift (enum tree_code code, enum machine_mode mode, rtx shifted, + int amount, rtx target, int unsignedp) +{ + /* ??? With re-writing expand_shift we could avoid going through a + tree for the shift amount and directly do GEN_INT (amount). */ + return expand_variable_shift (code, mode, shifted, + build_int_cst (integer_type_node, amount), + target, unsignedp); +} /* Indicates the type of fixup needed after a constant multiplication. BASIC_VARIANT means no fixup is needed, NEGATE_VARIANT means that @@ -2838,27 +2844,21 @@ expand_mult_const (enum machine_mode mode, rtx op0, HOST_WIDE_INT val, switch (alg->op[opno]) { case alg_shift: - tem = expand_shift (LSHIFT_EXPR, mode, accum, - build_int_cst (NULL_TREE, log), - NULL_RTX, 0); + tem = expand_shift (LSHIFT_EXPR, mode, accum, log, NULL_RTX, 0); /* REG_EQUAL note will be attached to the following insn. */ emit_move_insn (accum, tem); val_so_far <<= log; break; case alg_add_t_m2: - tem = expand_shift (LSHIFT_EXPR, mode, op0, - build_int_cst (NULL_TREE, log), - NULL_RTX, 0); + tem = expand_shift (LSHIFT_EXPR, mode, op0, log, NULL_RTX, 0); accum = force_operand (gen_rtx_PLUS (mode, accum, tem), add_target ? add_target : accum_target); val_so_far += (HOST_WIDE_INT) 1 << log; break; case alg_sub_t_m2: - tem = expand_shift (LSHIFT_EXPR, mode, op0, - build_int_cst (NULL_TREE, log), - NULL_RTX, 0); + tem = expand_shift (LSHIFT_EXPR, mode, op0, log, NULL_RTX, 0); accum = force_operand (gen_rtx_MINUS (mode, accum, tem), add_target ? add_target : accum_target); val_so_far -= (HOST_WIDE_INT) 1 << log; @@ -2866,9 +2866,7 @@ expand_mult_const (enum machine_mode mode, rtx op0, HOST_WIDE_INT val, case alg_add_t2_m: accum = expand_shift (LSHIFT_EXPR, mode, accum, - build_int_cst (NULL_TREE, log), - shift_subtarget, - 0); + log, shift_subtarget, 0); accum = force_operand (gen_rtx_PLUS (mode, accum, op0), add_target ? add_target : accum_target); val_so_far = (val_so_far << log) + 1; @@ -2876,26 +2874,21 @@ expand_mult_const (enum machine_mode mode, rtx op0, HOST_WIDE_INT val, case alg_sub_t2_m: accum = expand_shift (LSHIFT_EXPR, mode, accum, - build_int_cst (NULL_TREE, log), - shift_subtarget, 0); + log, shift_subtarget, 0); accum = force_operand (gen_rtx_MINUS (mode, accum, op0), add_target ? add_target : accum_target); val_so_far = (val_so_far << log) - 1; break; case alg_add_factor: - tem = expand_shift (LSHIFT_EXPR, mode, accum, - build_int_cst (NULL_TREE, log), - NULL_RTX, 0); + tem = expand_shift (LSHIFT_EXPR, mode, accum, log, NULL_RTX, 0); accum = force_operand (gen_rtx_PLUS (mode, accum, tem), add_target ? add_target : accum_target); val_so_far += val_so_far << log; break; case alg_sub_factor: - tem = expand_shift (LSHIFT_EXPR, mode, accum, - build_int_cst (NULL_TREE, log), - NULL_RTX, 0); + tem = expand_shift (LSHIFT_EXPR, mode, accum, log, NULL_RTX, 0); accum = force_operand (gen_rtx_MINUS (mode, tem, accum), (add_target ? add_target : (optimize ? 0 : tem))); @@ -3028,8 +3021,7 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, int shift = floor_log2 (CONST_DOUBLE_HIGH (op1)) + HOST_BITS_PER_WIDE_INT; return expand_shift (LSHIFT_EXPR, mode, op0, - build_int_cst (NULL_TREE, shift), - target, unsignedp); + shift, target, unsignedp); } } @@ -3042,8 +3034,7 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, /* Special case powers of two. */ if (EXACT_POWER_OF_2_OR_ZERO_P (coeff)) return expand_shift (LSHIFT_EXPR, mode, op0, - build_int_cst (NULL_TREE, floor_log2 (coeff)), - target, unsignedp); + floor_log2 (coeff), target, unsignedp); /* Exclude cost of op0 from max_cost to match the cost calculation of the synth_mult. */ @@ -3123,8 +3114,7 @@ expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, { op0 = convert_to_mode (mode, op0, this_optab == umul_widen_optab); return expand_shift (LSHIFT_EXPR, mode, op0, - build_int_cst (NULL_TREE, floor_log2 (coeff)), - target, unsignedp); + floor_log2 (coeff), target, unsignedp); } /* Exclude cost of op0 from max_cost to match the cost @@ -3297,16 +3287,14 @@ expand_mult_highpart_adjust (enum machine_mode mode, rtx adj_operand, rtx op0, enum rtx_code adj_code = unsignedp ? PLUS : MINUS; tem = expand_shift (RSHIFT_EXPR, mode, op0, - build_int_cst (NULL_TREE, GET_MODE_BITSIZE (mode) - 1), - NULL_RTX, 0); + GET_MODE_BITSIZE (mode) - 1, NULL_RTX, 0); tem = expand_and (mode, tem, op1, NULL_RTX); adj_operand = force_operand (gen_rtx_fmt_ee (adj_code, mode, adj_operand, tem), adj_operand); tem = expand_shift (RSHIFT_EXPR, mode, op1, - build_int_cst (NULL_TREE, GET_MODE_BITSIZE (mode) - 1), - NULL_RTX, 0); + GET_MODE_BITSIZE (mode) - 1, NULL_RTX, 0); tem = expand_and (mode, tem, op0, NULL_RTX); target = force_operand (gen_rtx_fmt_ee (adj_code, mode, adj_operand, tem), target); @@ -3328,7 +3316,7 @@ extract_high_half (enum machine_mode mode, rtx op) wider_mode = GET_MODE_WIDER_MODE (mode); op = expand_shift (RSHIFT_EXPR, wider_mode, op, - build_int_cst (NULL_TREE, GET_MODE_BITSIZE (mode)), 0, 1); + GET_MODE_BITSIZE (mode), 0, 1); return convert_modes (mode, wider_mode, op, 0); } @@ -3615,11 +3603,9 @@ static rtx expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) { rtx temp, label; - tree shift; int logd; logd = floor_log2 (d); - shift = build_int_cst (NULL_TREE, logd); if (d == 2 && BRANCH_COST (optimize_insn_for_speed_p (), @@ -3629,7 +3615,7 @@ expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) temp = emit_store_flag (temp, LT, op0, const0_rtx, mode, 0, 1); temp = expand_binop (mode, add_optab, temp, op0, NULL_RTX, 0, OPTAB_LIB_WIDEN); - return expand_shift (RSHIFT_EXPR, mode, temp, shift, NULL_RTX, 0); + return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0); } #ifdef HAVE_conditional_move @@ -3657,7 +3643,7 @@ expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) rtx seq = get_insns (); end_sequence (); emit_insn (seq); - return expand_shift (RSHIFT_EXPR, mode, temp2, shift, NULL_RTX, 0); + return expand_shift (RSHIFT_EXPR, mode, temp2, logd, NULL_RTX, 0); } end_sequence (); } @@ -3675,11 +3661,10 @@ expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) NULL_RTX, 0, OPTAB_LIB_WIDEN); else temp = expand_shift (RSHIFT_EXPR, mode, temp, - build_int_cst (NULL_TREE, ushift), - NULL_RTX, 1); + ushift, NULL_RTX, 1); temp = expand_binop (mode, add_optab, temp, op0, NULL_RTX, 0, OPTAB_LIB_WIDEN); - return expand_shift (RSHIFT_EXPR, mode, temp, shift, NULL_RTX, 0); + return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0); } label = gen_label_rtx (); @@ -3687,7 +3672,7 @@ expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) do_cmp_and_jump (temp, const0_rtx, GE, mode, label); expand_inc (temp, GEN_INT (d - 1)); emit_label (label); - return expand_shift (RSHIFT_EXPR, mode, temp, shift, NULL_RTX, 0); + return expand_shift (RSHIFT_EXPR, mode, temp, logd, NULL_RTX, 0); } /* Emit the code to divide OP0 by OP1, putting the result in TARGET @@ -3951,9 +3936,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, return gen_lowpart (mode, remainder); } quotient = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, - pre_shift), - tquotient, 1); + pre_shift, tquotient, 1); } else if (size <= HOST_BITS_PER_WIDE_INT) { @@ -4005,15 +3988,14 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, t2 = force_operand (gen_rtx_MINUS (compute_mode, op0, t1), NULL_RTX); - t3 = expand_shift (RSHIFT_EXPR, compute_mode, t2, - integer_one_node, NULL_RTX, 1); + t3 = expand_shift (RSHIFT_EXPR, compute_mode, + t2, 1, NULL_RTX, 1); t4 = force_operand (gen_rtx_PLUS (compute_mode, t1, t3), NULL_RTX); quotient = expand_shift (RSHIFT_EXPR, compute_mode, t4, - build_int_cst (NULL_TREE, post_shift - 1), - tquotient, 1); + post_shift - 1, tquotient, 1); } else { @@ -4025,8 +4007,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, pre_shift), - NULL_RTX, 1); + pre_shift, NULL_RTX, 1); extra_cost = (shift_cost[speed][compute_mode][pre_shift] + shift_cost[speed][compute_mode][post_shift]); @@ -4037,8 +4018,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, goto fail1; quotient = expand_shift (RSHIFT_EXPR, compute_mode, t2, - build_int_cst (NULL_TREE, post_shift), - tquotient, 1); + post_shift, tquotient, 1); } } } @@ -4170,12 +4150,10 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, goto fail1; t2 = expand_shift (RSHIFT_EXPR, compute_mode, t1, - build_int_cst (NULL_TREE, post_shift), - NULL_RTX, 0); + post_shift, NULL_RTX, 0); t3 = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, size - 1), - NULL_RTX, 0); + size - 1, NULL_RTX, 0); if (d < 0) quotient = force_operand (gen_rtx_MINUS (compute_mode, @@ -4210,12 +4188,10 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, NULL_RTX); t3 = expand_shift (RSHIFT_EXPR, compute_mode, t2, - build_int_cst (NULL_TREE, post_shift), - NULL_RTX, 0); + post_shift, NULL_RTX, 0); t4 = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, size - 1), - NULL_RTX, 0); + size - 1, NULL_RTX, 0); if (d < 0) quotient = force_operand (gen_rtx_MINUS (compute_mode, @@ -4272,8 +4248,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, } quotient = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, pre_shift), - tquotient, 0); + pre_shift, tquotient, 0); } else { @@ -4288,8 +4263,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, { t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, size - 1), - NULL_RTX, 0); + size - 1, NULL_RTX, 0); t2 = expand_binop (compute_mode, xor_optab, op0, t1, NULL_RTX, 0, OPTAB_WIDEN); extra_cost = (shift_cost[speed][compute_mode][post_shift] @@ -4302,8 +4276,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, { t4 = expand_shift (RSHIFT_EXPR, compute_mode, t3, - build_int_cst (NULL_TREE, post_shift), - NULL_RTX, 1); + post_shift, NULL_RTX, 1); quotient = expand_binop (compute_mode, xor_optab, t4, t1, tquotient, 0, OPTAB_WIDEN); @@ -4320,8 +4293,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, 0, OPTAB_WIDEN); nsign = expand_shift (RSHIFT_EXPR, compute_mode, t2, - build_int_cst (NULL_TREE, size - 1), - NULL_RTX, 0); + size - 1, NULL_RTX, 0); t3 = force_operand (gen_rtx_MINUS (compute_mode, t1, nsign), NULL_RTX); t4 = expand_divmod (0, TRUNC_DIV_EXPR, compute_mode, t3, op1, @@ -4435,8 +4407,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, rtx t1, t2, t3; unsigned HOST_WIDE_INT d = INTVAL (op1); t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, floor_log2 (d)), - tquotient, 1); + floor_log2 (d), tquotient, 1); t2 = expand_binop (compute_mode, and_optab, op0, GEN_INT (d - 1), NULL_RTX, 1, OPTAB_LIB_WIDEN); @@ -4533,8 +4504,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, rtx t1, t2, t3; unsigned HOST_WIDE_INT d = INTVAL (op1); t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, floor_log2 (d)), - tquotient, 0); + floor_log2 (d), tquotient, 0); t2 = expand_binop (compute_mode, and_optab, op0, GEN_INT (d - 1), NULL_RTX, 1, OPTAB_LIB_WIDEN); @@ -4655,8 +4625,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, pre_shift = floor_log2 (d & -d); ml = invert_mod2n (d >> pre_shift, size); t1 = expand_shift (RSHIFT_EXPR, compute_mode, op0, - build_int_cst (NULL_TREE, pre_shift), - NULL_RTX, unsignedp); + pre_shift, NULL_RTX, unsignedp); quotient = expand_mult (compute_mode, t1, gen_int_mode (ml, compute_mode), NULL_RTX, 1); @@ -4689,8 +4658,7 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, remainder, 1, OPTAB_LIB_WIDEN); } tem = plus_constant (op1, -1); - tem = expand_shift (RSHIFT_EXPR, compute_mode, tem, - integer_one_node, NULL_RTX, 1); + tem = expand_shift (RSHIFT_EXPR, compute_mode, tem, 1, NULL_RTX, 1); do_cmp_and_jump (remainder, tem, LEU, compute_mode, label); expand_inc (quotient, const1_rtx); expand_dec (remainder, op1); @@ -4715,13 +4683,12 @@ expand_divmod (int rem_flag, enum tree_code code, enum machine_mode mode, abs_rem = expand_abs (compute_mode, remainder, NULL_RTX, 1, 0); abs_op1 = expand_abs (compute_mode, op1, NULL_RTX, 1, 0); tem = expand_shift (LSHIFT_EXPR, compute_mode, abs_rem, - integer_one_node, NULL_RTX, 1); + 1, NULL_RTX, 1); do_cmp_and_jump (tem, abs_op1, LTU, compute_mode, label); tem = expand_binop (compute_mode, xor_optab, op0, op1, NULL_RTX, 0, OPTAB_WIDEN); mask = expand_shift (RSHIFT_EXPR, compute_mode, tem, - build_int_cst (NULL_TREE, size - 1), - NULL_RTX, 0); + size - 1, NULL_RTX, 0); tem = expand_binop (compute_mode, xor_optab, mask, const1_rtx, NULL_RTX, 0, OPTAB_WIDEN); tem = expand_binop (compute_mode, sub_optab, tem, mask, @@ -5090,7 +5057,7 @@ emit_cstore (rtx target, enum insn_code icode, enum rtx_code code, && (STORE_FLAG_VALUE & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (result_mode) - 1)))) op0 = expand_shift (RSHIFT_EXPR, result_mode, op0, - size_int (GET_MODE_BITSIZE (result_mode) - 1), subtarget, + GET_MODE_BITSIZE (result_mode) - 1, subtarget, normalizep == 1); else { @@ -5270,7 +5237,7 @@ emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, a logical shift from the sign bit to the low-order bit; for a -1/0 value, we do an arithmetic shift. */ op0 = expand_shift (RSHIFT_EXPR, mode, op0, - size_int (GET_MODE_BITSIZE (mode) - 1), + GET_MODE_BITSIZE (mode) - 1, subtarget, normalizep != -1); if (mode != target_mode) @@ -5555,7 +5522,7 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, subtarget = 0; tem = expand_shift (RSHIFT_EXPR, mode, op0, - size_int (GET_MODE_BITSIZE (mode) - 1), + GET_MODE_BITSIZE (mode) - 1, subtarget, 0); tem = expand_binop (mode, sub_optab, tem, op0, subtarget, 0, OPTAB_WIDEN); @@ -5621,7 +5588,7 @@ emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, if (tem && normalizep) tem = expand_shift (RSHIFT_EXPR, mode, tem, - size_int (GET_MODE_BITSIZE (mode) - 1), + GET_MODE_BITSIZE (mode) - 1, subtarget, normalizep == 1); if (tem) diff --git a/gcc/expr.c b/gcc/expr.c index ecaf1d798a2..5574b2d1ab9 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -616,7 +616,7 @@ convert_move (rtx to, rtx from, int unsignedp) { enum machine_mode intermediate; rtx tmp; - tree shift_amount; + int shift_amount; /* Search for a mode to convert via. */ for (intermediate = from_mode; intermediate != VOIDmode; @@ -636,9 +636,8 @@ convert_move (rtx to, rtx from, int unsignedp) /* No suitable intermediate mode. Generate what we need with shifts. */ - shift_amount = build_int_cst (NULL_TREE, - GET_MODE_BITSIZE (to_mode) - - GET_MODE_BITSIZE (from_mode)); + shift_amount = (GET_MODE_BITSIZE (to_mode) + - GET_MODE_BITSIZE (from_mode)); from = gen_lowpart (to_mode, force_reg (from_mode, from)); tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount, to, unsignedp); @@ -1753,7 +1752,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize) if (shift) tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i], - build_int_cst (NULL_TREE, shift), tmps[i], 0); + shift, tmps[i], 0); } } @@ -2050,8 +2049,7 @@ emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize) { int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i], - build_int_cst (NULL_TREE, shift), - tmps[i], 0); + shift, tmps[i], 0); } bytelen = adj_bytelen; } @@ -4052,8 +4050,7 @@ optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize, binop = xor_optab; } value = expand_shift (LSHIFT_EXPR, str_mode, value, - build_int_cst (NULL_TREE, bitpos), - NULL_RTX, 1); + bitpos, NULL_RTX, 1); result = expand_binop (str_mode, binop, str_rtx, value, str_rtx, 1, OPTAB_WIDEN); if (result != str_rtx) @@ -4087,8 +4084,7 @@ optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize, NULL_RTX); } value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value, - build_int_cst (NULL_TREE, bitpos), - NULL_RTX, 1); + bitpos, NULL_RTX, 1); result = expand_binop (GET_MODE (str_rtx), binop, str_rtx, value, str_rtx, 1, OPTAB_WIDEN); if (result != str_rtx) @@ -5882,8 +5878,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos, && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp)) && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE) temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp, - size_int (GET_MODE_BITSIZE (GET_MODE (temp)) - - bitsize), + GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize, NULL_RTX, 1); /* Unless MODE is VOIDmode or BLKmode, convert TEMP to @@ -8064,8 +8059,8 @@ expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode, target = 0; op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL); - temp = expand_shift (code, mode, op0, treeop1, target, - unsignedp); + temp = expand_variable_shift (code, mode, op0, treeop1, target, + unsignedp); if (code == LSHIFT_EXPR) temp = REDUCE_BIT_FIELD (temp); return temp; @@ -8980,9 +8975,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, } else { - tree count - = build_int_cst (NULL_TREE, - GET_MODE_BITSIZE (imode) - bitsize); + int count = GET_MODE_BITSIZE (imode) - bitsize; op0 = expand_shift (LSHIFT_EXPR, imode, op0, count, target, 0); @@ -9251,9 +9244,8 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0))) op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0, - size_int (GET_MODE_BITSIZE (GET_MODE (op0)) - - bitsize), - op0, 1); + GET_MODE_BITSIZE (GET_MODE (op0)) + - bitsize, op0, 1); /* If the result type is BLKmode, store the data into a temporary of the appropriate type, but with the mode corresponding to the @@ -9750,10 +9742,11 @@ reduce_to_bit_field_precision (rtx exp, rtx target, tree type) } else { - tree count = build_int_cst (NULL_TREE, - GET_MODE_BITSIZE (GET_MODE (exp)) - prec); - exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0); - return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0); + int count = GET_MODE_BITSIZE (GET_MODE (exp)) - prec; + exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), + exp, count, target, 0); + return expand_shift (RSHIFT_EXPR, GET_MODE (exp), + exp, count, target, 0); } } diff --git a/gcc/expr.h b/gcc/expr.h index f770a35b6de..cb4050dc10d 100644 --- a/gcc/expr.h +++ b/gcc/expr.h @@ -488,8 +488,10 @@ extern rtx expand_call (tree, rtx, int); extern void fixup_tail_calls (void); #ifdef TREE_CODE -extern rtx expand_shift (enum tree_code, enum machine_mode, rtx, tree, rtx, - int); +extern rtx expand_variable_shift (enum tree_code, enum machine_mode, + rtx, tree, rtx, int); +extern rtx expand_shift (enum tree_code, enum machine_mode, rtx, int, rtx, + int); extern rtx expand_divmod (int, enum tree_code, enum machine_mode, rtx, rtx, rtx, int); #endif diff --git a/gcc/function.c b/gcc/function.c index 1ba9dbbed28..973e5a1d34e 100644 --- a/gcc/function.c +++ b/gcc/function.c @@ -2876,9 +2876,7 @@ assign_parm_setup_block (struct assign_parm_data_all *all, int by = (UNITS_PER_WORD - size) * BITS_PER_UNIT; rtx reg = gen_rtx_REG (word_mode, REGNO (entry_parm)); - x = expand_shift (LSHIFT_EXPR, word_mode, reg, - build_int_cst (NULL_TREE, by), - NULL_RTX, 1); + x = expand_shift (LSHIFT_EXPR, word_mode, reg, by, NULL_RTX, 1); tem = change_address (mem, word_mode, 0); emit_move_insn (tem, x); } diff --git a/gcc/lower-subreg.c b/gcc/lower-subreg.c index 5f988a9564d..2119c0902b3 100644 --- a/gcc/lower-subreg.c +++ b/gcc/lower-subreg.c @@ -1039,8 +1039,7 @@ resolve_shift_zext (rtx insn) src_reg = expand_shift (GET_CODE (op) == ASHIFT ? LSHIFT_EXPR : RSHIFT_EXPR, word_mode, src_reg, - build_int_cst (NULL_TREE, - shift_count - BITS_PER_WORD), + shift_count - BITS_PER_WORD, dest_reg, 1); } diff --git a/gcc/optabs.c b/gcc/optabs.c index 34bd731c3b3..62e123ba514 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -2453,8 +2453,8 @@ widen_bswap (enum machine_mode mode, rtx op0, rtx target) if (x != 0) x = expand_shift (RSHIFT_EXPR, wider_mode, x, - size_int (GET_MODE_BITSIZE (wider_mode) - - GET_MODE_BITSIZE (mode)), + GET_MODE_BITSIZE (wider_mode) + - GET_MODE_BITSIZE (mode), NULL_RTX, true); if (x != 0) @@ -3150,7 +3150,7 @@ expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target, false) >= 2) { rtx extended = expand_shift (RSHIFT_EXPR, mode, op0, - size_int (GET_MODE_BITSIZE (mode) - 1), + GET_MODE_BITSIZE (mode) - 1, NULL_RTX, 0); temp = expand_binop (mode, xor_optab, extended, op0, target, 0, @@ -3251,7 +3251,7 @@ expand_one_cmpl_abs_nojump (enum machine_mode mode, rtx op0, rtx target) false) >= 2) { rtx extended = expand_shift (RSHIFT_EXPR, mode, op0, - size_int (GET_MODE_BITSIZE (mode) - 1), + GET_MODE_BITSIZE (mode) - 1, NULL_RTX, 0); temp = expand_binop (mode, xor_optab, extended, op0, target, 0, @@ -4724,8 +4724,7 @@ expand_float (rtx to, rtx from, int unsignedp) emit_label (neglabel); temp = expand_binop (imode, and_optab, from, const1_rtx, NULL_RTX, 1, OPTAB_LIB_WIDEN); - temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node, - NULL_RTX, 1); + temp1 = expand_shift (RSHIFT_EXPR, imode, from, 1, NULL_RTX, 1); temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1, OPTAB_LIB_WIDEN); expand_float (target, temp, 0);