From: Gabe Black <gabeblack@google.com>
Date: Fri, 12 Oct 2018 12:11:20 +0000 (-0700)
Subject: mem: Explicitly specify the endianness in the abstract memory.
X-Git-Tag: v19.0.0.0~1473
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eb8989ec7649335c959947335c96f3b563623962;p=gem5.git

mem: Explicitly specify the endianness in the abstract memory.

The accessors are used for debugging output. If we're using an ISA
where there's an endianness, we use that explicitly, falling back to a
binary dump if the size isn't supported. If not, then we just dump the
data without interpretation regardless of size.

Change-Id: Ib050c4c876ee41f17cfd14ad657150bf6ab1de39
Reviewed-on: https://gem5-review.googlesource.com/c/13464
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
---

diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc
index 01817bbf9..084ee26ad 100644
--- a/src/mem/abstract_mem.cc
+++ b/src/mem/abstract_mem.cc
@@ -289,38 +289,29 @@ AbstractMemory::checkLockedAddrList(PacketPtr pkt)
     return allowStore;
 }
 
+static inline void
+tracePacket(System *sys, const char *label, PacketPtr pkt)
+{
+    int size = pkt->getSize();
+#if THE_ISA != NULL_ISA
+    if (size == 1 || size == 2 || size == 4 || size == 8) {
+        DPRINTF(MemoryAccess,"%s from %s of size %i on address %#x data "
+                "%#x %c\n", label, sys->getMasterName(pkt->req->masterId()),
+                size, pkt->getAddr(), pkt->getUintX(TheISA::GuestByteOrder),
+                pkt->req->isUncacheable() ? 'U' : 'C');
+        return;
+    }
+#endif
+    DPRINTF(MemoryAccess, "%s from %s of size %i on address %#x %c\n",
+            label, sys->getMasterName(pkt->req->masterId()),
+            size, pkt->getAddr(), pkt->req->isUncacheable() ? 'U' : 'C');
+    DDUMP(MemoryAccess, pkt->getConstPtr<uint8_t>(), pkt->getSize());
+}
 
 #if TRACING_ON
-
-#define CASE(A, T)                                                        \
-  case sizeof(T):                                                         \
-    DPRINTF(MemoryAccess,"%s from %s of size %i on address 0x%x data " \
-            "0x%x %c\n", A, system()->getMasterName(pkt->req->masterId()),\
-            pkt->getSize(), pkt->getAddr(), pkt->get<T>(),                \
-            pkt->req->isUncacheable() ? 'U' : 'C');                       \
-  break
-
-
-#define TRACE_PACKET(A)                                                 \
-    do {                                                                \
-        switch (pkt->getSize()) {                                       \
-          CASE(A, uint64_t);                                            \
-          CASE(A, uint32_t);                                            \
-          CASE(A, uint16_t);                                            \
-          CASE(A, uint8_t);                                             \
-          default:                                                      \
-            DPRINTF(MemoryAccess, "%s from %s of size %i on address 0x%x %c\n",\
-                    A, system()->getMasterName(pkt->req->masterId()),          \
-                    pkt->getSize(), pkt->getAddr(),                            \
-                    pkt->req->isUncacheable() ? 'U' : 'C');                    \
-            DDUMP(MemoryAccess, pkt->getConstPtr<uint8_t>(), pkt->getSize());  \
-        }                                                                      \
-    } while (0)
-
+#   define TRACE_PACKET(A) tracePacket(system(), A, pkt)
 #else
-
-#define TRACE_PACKET(A)
-
+#   define TRACE_PACKET(A)
 #endif
 
 void