From: David Edelsohn Date: Sat, 23 Jan 2021 00:54:24 +0000 (-0500) Subject: testsuite: fix gcc.target/powerpc ilp32 failures X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eb9883c1312c3801e5c25e763729d011343b22c3;p=gcc.git testsuite: fix gcc.target/powerpc ilp32 failures The recent vec insert code generation changes were not reflected in the expected output for ilp32 targets. This patch updates the expected instructions and counts. gcc/testsuite/ChangeLog: * gcc.target/powerpc/fold-vec-insert-char-p9.c: Adjust ilp32. * gcc.target/powerpc/fold-vec-insert-float-p9.c: Same. * gcc.target/powerpc/fold-vec-insert-int-p9.c: Same. * gcc.target/powerpc/fold-vec-insert-longlong.c: Same. * gcc.target/powerpc/fold-vec-insert-short-p9.c: Same. * gcc.target/powerpc/pr79251.p9.c: Same. --- diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c index 35ae420dba0..e8f8ba39731 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c @@ -54,9 +54,8 @@ vector unsigned char testuu_cst (unsigned char x, vector unsigned char v) /* -m32 codegen. */ /* { dg-final { scan-assembler-times {\mrlwinm\M} 4 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\madd\M} 4 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mstxv\M} 4 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstb\M} 8 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlxv\M} 8 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mlvebx\M} 4 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mvperm\M} 4 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mlvebx\M} 8 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mvperm\M} 8 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mxxperm\M} 8 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c index ba41330d835..dfca9fd04ef 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c @@ -30,5 +30,6 @@ testf_cst (float f, vector float vf) /* { dg-final { scan-assembler-times {\mstfs\M} 2 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlxv\M} 2 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mlvewx\M} 1 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mvperm\M} 1 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mlvewx\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mvperm\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mxxperm\M} 2 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c index 01d4eee81fb..21f0d9a0272 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c @@ -59,5 +59,6 @@ testui2_cst(unsigned int x, vector unsigned int v) /* { dg-final { scan-assembler-times {\mstw\M} 8 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlxv\M} 8 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mlvewx\M} 4 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\mvperm\M} 4 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mlvewx\M} 8 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mvperm\M} 8 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mxxperm\M} 8 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c index aa52efe13a6..b8d5528a4e0 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c @@ -62,7 +62,7 @@ testul2_cst(unsigned long long x, vector unsigned long long v) /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 0 } } */ /* { dg-final { scan-assembler-times {\mstdx\M} 0 { target lp64 } } } */ -/* { dg-final { scan-assembler-times {\mstw\M} 8 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mvperm\M} 8 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c index 55778bda3a5..dbb43a7929a 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c @@ -56,6 +56,8 @@ testus2_cst(unsigned short x, vector unsigned short v) /* -m32 uses sth/lvehx as part of the sequence. */ /* { dg-final { scan-assembler-times {\msth\M} 8 { target ilp32 }} } */ -/* { dg-final { scan-assembler-times {\mlvehx\M} 4 { target ilp32 }} } */ +/* { dg-final { scan-assembler-times {\mlvehx\M} 8 { target ilp32 }} } */ +/* { dg-final { scan-assembler-times {\mvperm\M} 8 { target ilp32 }} } */ +/* { dg-final { scan-assembler-times {\mxxperm\M} 8 { target ilp32 }} } */ /* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 8 { target ilp32 }} } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c b/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c index ec1cb255888..8ebeab425ff 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c +++ b/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c @@ -12,7 +12,13 @@ TEST_VEC_INSERT_ALL (test) /* { dg-final { scan-assembler-times {\mlvsl\M} 10 } } */ /* { dg-final { scan-assembler-times {\mlvsr\M} 10 } } */ /* { dg-final { scan-assembler-times {\mxxperm\M} 20 } } */ -/* { dg-final { scan-assembler-times {\mxxinsertw\M} 3 } } */ -/* { dg-final { scan-assembler-times {\mvinserth\M} 2 } } */ -/* { dg-final { scan-assembler-times {\mvinsertb\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mxxinsertw\M} 3 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mvinserth\M} 2 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mvinsertb\M} 2 { target lp64 } } } */ /* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 } } */ + +/* { dg-final { scan-assembler-times {\mrlwinm\M} 10 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mvperm\M} 7 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mlvebx\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mlvehx\M} 2 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mlvewx\M} 3 { target ilp32 } } } */