From: Sebastien Bourdeauducq Date: Sat, 14 Sep 2013 17:36:02 +0000 (+0200) Subject: mixxeo: swap pairs 0 and 1 on DVI1 X-Git-Tag: 24jan2021_ls180~2099^2~443^2~2^2 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ebe8a27de9592a69656b946c5fc94335ac59227a;p=litex.git mixxeo: swap pairs 0 and 1 on DVI1 --- diff --git a/mibuild/platforms/mixxeo.py b/mibuild/platforms/mixxeo.py index cfd1d144..1eb5d83e 100644 --- a/mibuild/platforms/mixxeo.py +++ b/mibuild/platforms/mixxeo.py @@ -101,10 +101,10 @@ _io = [ ("dvi_in", 1, Subsignal("clk_p", Pins("C11"), IOStandard("TMDS_33")), Subsignal("clk_n", Pins("A11"), IOStandard("TMDS_33")), - Subsignal("data0_p", Pins("C17"), IOStandard("TMDS_33")), - Subsignal("data0_n", Pins("A17"), IOStandard("TMDS_33")), - Subsignal("data1_p", Pins("B18"), IOStandard("TMDS_33")), - Subsignal("data1_n", Pins("A18"), IOStandard("TMDS_33")), + Subsignal("data0_p", Pins("B18"), IOStandard("TMDS_33")), + Subsignal("data0_n", Pins("A18"), IOStandard("TMDS_33")), + Subsignal("data1_p", Pins("C17"), IOStandard("TMDS_33")), + Subsignal("data1_n", Pins("A17"), IOStandard("TMDS_33")), Subsignal("data2_p", Pins("E16"), IOStandard("TMDS_33")), Subsignal("data2_n", Pins("D17"), IOStandard("TMDS_33")), Subsignal("scl", Pins("F17"), IOStandard("LVCMOS33")),