From: Samuel Pitoiset Date: Fri, 28 Aug 2020 06:41:20 +0000 (+0200) Subject: radv,aco: disable opts if VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ebf2576862ca29b1173e3b7fee0cc03acbb4d7ef;p=mesa.git radv,aco: disable opts if VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT Sounds useful to determine if ACO breaks a specific pipeline because of various optimizations. Signed-off-by: Samuel Pitoiset Reviewed-by: Daniel Schürmann Part-of: --- diff --git a/src/amd/compiler/aco_interface.cpp b/src/amd/compiler/aco_interface.cpp index 4b0ea2ff5d0..27a072ce6bb 100644 --- a/src/amd/compiler/aco_interface.cpp +++ b/src/amd/compiler/aco_interface.cpp @@ -89,10 +89,12 @@ void aco_compile_shader(unsigned shader_count, validate(program.get()); /* Optimization */ - if (!(aco::debug_flags & aco::DEBUG_NO_VN)) - aco::value_numbering(program.get()); - if (!(aco::debug_flags & aco::DEBUG_NO_OPT)) - aco::optimize(program.get()); + if (!args->options->disable_optimizations) { + if (!(aco::debug_flags & aco::DEBUG_NO_VN)) + aco::value_numbering(program.get()); + if (!(aco::debug_flags & aco::DEBUG_NO_OPT)) + aco::optimize(program.get()); + } /* cleanup and exec mask handling */ aco::setup_reduce_temp(program.get()); @@ -123,7 +125,8 @@ void aco_compile_shader(unsigned shader_count, aco::collect_presched_stats(program.get()); if (!args->is_trap_handler_shader) { - if (!(aco::debug_flags & aco::DEBUG_NO_SCHED)) + if (!args->options->disable_optimizations && + !(aco::debug_flags & aco::DEBUG_NO_SCHED)) aco::schedule_program(program.get(), live_vars); validate(program.get()); diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index c6d029159c7..e56b0ec5fdd 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2840,6 +2840,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, bool keep_statistic_info = (flags & VK_PIPELINE_CREATE_CAPTURE_STATISTICS_BIT_KHR) || (device->instance->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) || device->keep_shader_info; + bool disable_optimizations = flags & VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT; radv_start_feedback(pipeline_feedback); @@ -3003,7 +3004,8 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, pipeline->gs_copy_shader = radv_create_gs_copy_shader( device, nir[MESA_SHADER_GEOMETRY], &info, &gs_copy_binary, keep_executable_info, keep_statistic_info, - keys[MESA_SHADER_GEOMETRY].has_multiview_view_index); + keys[MESA_SHADER_GEOMETRY].has_multiview_view_index, + disable_optimizations); } if (!keep_executable_info && !keep_statistic_info && pipeline->gs_copy_shader) { @@ -3030,7 +3032,8 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, pipeline->layout, keys + MESA_SHADER_FRAGMENT, infos + MESA_SHADER_FRAGMENT, keep_executable_info, keep_statistic_info, - &binaries[MESA_SHADER_FRAGMENT]); + disable_optimizations, + &binaries[MESA_SHADER_FRAGMENT]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT], false); } @@ -3047,7 +3050,9 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_variant_compile(device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline->layout, &key, &infos[MESA_SHADER_TESS_CTRL], keep_executable_info, - keep_statistic_info, &binaries[MESA_SHADER_TESS_CTRL]); + keep_statistic_info, + disable_optimizations, + &binaries[MESA_SHADER_TESS_CTRL]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL], false); } @@ -3066,7 +3071,9 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_variant_compile(device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline->layout, &keys[pre_stage], &infos[MESA_SHADER_GEOMETRY], keep_executable_info, - keep_statistic_info, &binaries[MESA_SHADER_GEOMETRY]); + keep_statistic_info, + disable_optimizations, + &binaries[MESA_SHADER_GEOMETRY]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY], false); } @@ -3088,7 +3095,9 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[i] = radv_shader_variant_compile(device, modules[i], &nir[i], 1, pipeline->layout, keys + i, infos + i, keep_executable_info, - keep_statistic_info, &binaries[i]); + keep_statistic_info, + disable_optimizations, + &binaries[i]); radv_stop_feedback(stage_feedbacks[i], false); } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index aff3249da95..c76975c2252 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1324,6 +1324,7 @@ radv_shader_variant_compile(struct radv_device *device, const struct radv_shader_variant_key *key, struct radv_shader_info *info, bool keep_shader_info, bool keep_statistic_info, + bool disable_optimizations, struct radv_shader_binary **binary_out) { gl_shader_stage stage = shaders[shader_count - 1]->info.stage; @@ -1335,6 +1336,7 @@ radv_shader_variant_compile(struct radv_device *device, options.explicit_scratch_args = !radv_use_llvm_for_stage(device, stage); options.robust_buffer_access = device->robust_buffer_access; + options.disable_optimizations = disable_optimizations; return shader_variant_compile(device, module, shaders, shader_count, stage, info, &options, false, false, @@ -1347,13 +1349,14 @@ radv_create_gs_copy_shader(struct radv_device *device, struct radv_shader_info *info, struct radv_shader_binary **binary_out, bool keep_shader_info, bool keep_statistic_info, - bool multiview) + bool multiview, bool disable_optimizations) { struct radv_nir_compiler_options options = {0}; gl_shader_stage stage = MESA_SHADER_VERTEX; options.explicit_scratch_args = !radv_use_llvm_for_stage(device, stage); options.key.has_multiview_view_index = multiview; + options.disable_optimizations = disable_optimizations; return shader_variant_compile(device, NULL, &shader, 1, stage, info, &options, true, false, diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 81f62014009..59497891ffd 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -148,6 +148,7 @@ struct radv_nir_compiler_options { bool has_ls_vgpr_init_bug; bool use_ngg_streamout; bool enable_mrt_output_nan_fixup; + bool disable_optimizations; /* only used by ACO */ enum radeon_family family; enum chip_class chip_class; uint32_t tess_offchip_block_dw_size; @@ -479,6 +480,7 @@ radv_shader_variant_compile(struct radv_device *device, const struct radv_shader_variant_key *key, struct radv_shader_info *info, bool keep_shader_info, bool keep_statistic_info, + bool disable_optimizations, struct radv_shader_binary **binary_out); struct radv_shader_variant * @@ -486,7 +488,8 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir, struct radv_shader_info *info, struct radv_shader_binary **binary_out, bool multiview, bool keep_shader_info, - bool keep_statistic_info); + bool keep_statistic_info, + bool disable_optimizations); struct radv_shader_variant * radv_create_trap_handler_shader(struct radv_device *device);