From: Luke Kenneth Casson Leighton Date: Tue, 21 Jan 2020 10:41:30 +0000 (+0000) Subject: add 4,5 points X-Git-Tag: convert-csv-opcode-to-binary~3799 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ebfbda3ea44a63b7268d09cc861bb89f5a3f976a;p=libreriscv.git add 4,5 points --- diff --git a/3d_gpu/arch_comparison.mdwn b/3d_gpu/arch_comparison.mdwn index dba10a3e3..ba8081964 100644 --- a/3d_gpu/arch_comparison.mdwn +++ b/3d_gpu/arch_comparison.mdwn @@ -8,6 +8,7 @@ Feature/Need | RISC-V | MIPS | OpenPOWER | OpenRISC | Open | NO (1) | NO (2) | NO (3) | Yes | Libre-friendly | NO (1) | unknown | Yes | Yes | Trademarked | Yes | Yes | Yes | No | +Extensible | NO (4) | unknown | (5) | Yes | gcc | Yes | Yes | Yes | Yes | llvm | Yes | Yes | Yes | Yes | distros (deb) | Yes | Yes | Yes | No | @@ -18,3 +19,8 @@ linux kernel | Yes | Yes | Yes | Yes | * (1) too numerous reasons to count, for well over 4 years. * (2) efforts to be "open" have stalled, website non-functional * (3) OpenPower Foundation making a huge effort, really appreciated +* (4) repeated in-good-faith requests for participation and inclusion in + extending RISC-V have met with stone-cold silence for over 18 months, + in direct violation of Trademark Law's clear-cut responsibilities. +* (5) provisionally and in principle: yes. however as of 2019jan21 this is + yet to be tested and an agreement reached.