From: Michael Meissner Date: Tue, 14 Nov 2017 23:04:27 +0000 (+0000) Subject: rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't generate the XXBRD instruction. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ec0c1fab90919d616141aefaac09cee0803a909b;p=gcc.git rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't generate the XXBRD instruction. 2017-11-14 Michael Meissner * config/rs6000/rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't generate the XXBRD instruction. From-SVN: r254742 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0acc10027a1..15f391fb726 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2017-11-14 Michael Meissner + * config/rs6000/rs6000.md (bswapdi2): On 32-bit ISA 3.0, don't + generate the XXBRD instruction. + * config/rs6000/rs6000-c.c (is_float128_p): New helper function. (rs6000_builtin_type_compatible): Treat _Float128 and long double as being compatible if -mabi=ieeelongdouble. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 9b0f872cee3..276ad8a32e8 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2520,12 +2520,6 @@ DONE; } - if (TARGET_P9_VECTOR && !MEM_P (src) && !MEM_P (dest)) - { - emit_insn (gen_bswapdi2_xxbrd (dest, src)); - DONE; - } - if (!TARGET_POWERPC64) { /* 32-bit mode needs fewer scratch registers, but 32-bit addressing mode