From: whitequark Date: Wed, 5 Jun 2019 08:59:40 +0000 (+0000) Subject: Update to track changes in nmigen. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ec6316eb33412ba6abd606faae0bfd7674b4c85e;p=nmigen-boards.git Update to track changes in nmigen. --- diff --git a/nmigen_boards/_blinky.py b/nmigen_boards/_blinky.py index 1e533ef..4fc0cc8 100644 --- a/nmigen_boards/_blinky.py +++ b/nmigen_boards/_blinky.py @@ -1,15 +1,18 @@ import itertools from nmigen import * -from nmigen.build import ConstraintError +from nmigen.build import ResourceError class Blinky(Elaboratable): + def __init__(self, clk_name, clk_freq): + self.clk_name = clk_name + self.clk_freq = clk_freq + def elaborate(self, platform): m = Module() - clk_name, clk_freq = next(iter(platform.clocks.items())) - clk = platform.request(*clk_name) + clk = platform.request(self.clk_name) m.domains.sync = ClockDomain() m.d.comb += ClockSignal().eq(clk.i) @@ -17,11 +20,11 @@ class Blinky(Elaboratable): for n in itertools.count(): try: leds.append(platform.request("user_led", n)) - except ConstraintError: + except ResourceError: break leds = Cat(led.o for led in leds) - ctr = Signal(max=int(clk_freq//2), reset=int(clk_freq//2) - 1) + ctr = Signal(max=int(self.clk_freq//2), reset=int(self.clk_freq//2) - 1) with m.If(ctr == 0): m.d.sync += ctr.eq(ctr.reset) m.d.sync += leds.eq(~leds) @@ -31,5 +34,5 @@ class Blinky(Elaboratable): return m -def build_and_program(platform_cls, **kwargs): - platform_cls().build(Blinky(), do_program=True, **kwargs) +def build_and_program(platform_cls, clk_name, clk_freq, **kwargs): + platform_cls().build(Blinky(clk_name, clk_freq), do_program=True, **kwargs) diff --git a/nmigen_boards/ice40_hx1k_blink_evn.py b/nmigen_boards/ice40_hx1k_blink_evn.py index ab940bf..976091f 100644 --- a/nmigen_boards/ice40_hx1k_blink_evn.py +++ b/nmigen_boards/ice40_hx1k_blink_evn.py @@ -11,22 +11,27 @@ __all__ = ["ICE40HX1KBlinkEVNPlatform"] class ICE40HX1KBlinkEVNPlatform(LatticeICE40Platform): device = "iCE40HX1K" package = "VQ100" - clocks = [ - ("clk3p3", 3.3e6), - ] resources = [ - Resource("clk3p3", 0, Pins("13", dir="i"), - extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}), - - Resource("user_led", 0, Pins("59", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 1, Pins("56", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 2, Pins("53", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 3, Pins("51", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - - Resource("user_btn", 0, Pins("60"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_btn", 1, Pins("57"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_btn", 2, Pins("54"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_btn", 3, Pins("52"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("clk3p3", 0, Pins("13", dir="i"), Clock(3.3e6), + Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")), + + Resource("user_led", 0, Pins("59", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_led", 1, Pins("56", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_led", 2, Pins("53", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_led", 3, Pins("51", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + + Resource("user_btn", 0, Pins("60"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_btn", 1, Pins("57"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_btn", 2, Pins("54"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_btn", 3, Pins("52"), Attrs(IO_STANDARD="SB_LVCMOS33")), + + Resource("spiflash", 0, + Subsignal("cs_n", Pins("49", dir="o")), + Subsignal("clk", Pins("48", dir="o")), + Subsignal("mosi", Pins("45", dir="o")), + Subsignal("miso", Pins("46", dir="i")), + Attrs(IO_STANDARD="SB_LVCMOS33") + ), ] connectors = [ Connector("pmod", 1, "10 9 8 7 - - 4 3 2 1 - -"), # J1 @@ -44,4 +49,4 @@ class ICE40HX1KBlinkEVNPlatform(LatticeICE40Platform): if __name__ == "__main__": from ._blinky import build_and_program - build_and_program(ICE40HX1KBlinkEVNPlatform) + build_and_program(ICE40HX1KBlinkEVNPlatform, "clk3p3", 3.3e6) diff --git a/nmigen_boards/icestick.py b/nmigen_boards/icestick.py index a80a3f9..b90573b 100644 --- a/nmigen_boards/icestick.py +++ b/nmigen_boards/icestick.py @@ -11,18 +11,15 @@ __all__ = ["ICEStickPlatform"] class ICEStickPlatform(LatticeICE40Platform): device = "iCE40HX1K" package = "TQ144" - clocks = [ - ("clk12", 12e6), - ] resources = [ Resource("clk12", 0, Pins("21", dir="i"), - extras={"GLOBAL": "1", "IO_STANDARD": "SB_LVCMOS33"}), + Clock(12e6), Attrs(GLOBAL="1", IO_STANDARD="SB_LVCMOS33")), - Resource("user_led", 0, Pins("99", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 1, Pins("98", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 2, Pins("97", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 3, Pins("96", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), - Resource("user_led", 4, Pins("95", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 0, Pins("99", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_led", 1, Pins("98", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_led", 2, Pins("97", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_led", 3, Pins("96", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), + Resource("user_led", 4, Pins("95", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), Resource("serial", 0, Subsignal("rx", Pins("9", dir="i")), @@ -32,14 +29,14 @@ class ICEStickPlatform(LatticeICE40Platform): Subsignal("dtr", Pins("3", dir="o")), Subsignal("dsr", Pins("2", dir="i")), Subsignal("dcd", Pins("1", dir="i")), - extras={"IO_STANDARD": "SB_LVTTL", "PULLUP": "1"} + Attrs(IO_STANDARD="SB_LVTTL", PULLUP="1") ), Resource("irda", 0, Subsignal("rx", Pins("106", dir="i")), Subsignal("tx", Pins("105", dir="o")), Subsignal("sd", Pins("107", dir="o")), - extras={"IO_STANDARD": "SB_LVCMOS33"} + Attrs(IO_STANDARD="SB_LVCMOS33") ), Resource("spiflash", 0, @@ -47,7 +44,7 @@ class ICEStickPlatform(LatticeICE40Platform): Subsignal("clk", Pins("70", dir="o")), Subsignal("mosi", Pins("67", dir="o")), Subsignal("miso", Pins("68", dir="i")), - extras={"IO_STANDARD": "SB_LVCMOS33"} + Attrs(IO_STANDARD="SB_LVCMOS33") ), ] connectors = [ @@ -65,4 +62,4 @@ class ICEStickPlatform(LatticeICE40Platform): if __name__ == "__main__": from ._blinky import build_and_program - build_and_program(ICEStickPlatform) + build_and_program(ICEStickPlatform, "clk12", 12e6) diff --git a/nmigen_boards/tinyfpga_bx.py b/nmigen_boards/tinyfpga_bx.py index 3d93dc8..0ad94b9 100644 --- a/nmigen_boards/tinyfpga_bx.py +++ b/nmigen_boards/tinyfpga_bx.py @@ -11,20 +11,17 @@ __all__ = ["TinyFPGABXPlatform"] class TinyFPGABXPlatform(LatticeICE40Platform): device = "iCE40LP8K" package = "CM81" - clocks = [ - ("clk16", 16e6), - ] resources = [ Resource("clk16", 0, Pins("B2", dir="i"), - extras={"IO_STANDARD": "SB_LVCMOS33"}), + Clock(16e6), Attrs(IO_STANDARD="SB_LVCMOS33")), - Resource("user_led", 0, Pins("B3", dir="o"), extras={"IO_STANDARD": "SB_LVCMOS33"}), + Resource("user_led", 0, Pins("B3", dir="o"), Attrs(IO_STANDARD="SB_LVCMOS33")), Resource("usb", 0, Subsignal("d_p", Pins("B4", dir="io")), Subsignal("d_n", Pins("A4", dir="io")), Subsignal("pullup", Pins("A3", dir="o")), - extras={"IO_STANDARD": "SB_LVCMOS33"} + Attrs(IO_STANDARD="SB_LVCMOS33") ), Resource("spiflash", 0, @@ -34,14 +31,14 @@ class TinyFPGABXPlatform(LatticeICE40Platform): Subsignal("miso", Pins("H7", dir="i")), Subsignal("wp", Pins("H4", dir="o")), Subsignal("hold", Pins("J8", dir="o")), - extras={"IO_STANDARD": "SB_LVCMOS33"} + Attrs(IO_STANDARD="SB_LVCMOS33") ), Resource("spiflash4x", 0, Subsignal("cs_n", Pins("F7", dir="o")), Subsignal("clk", Pins("G7", dir="o")), Subsignal("dq", Pins("G6 H7 H4 J8", dir="io")), - extras={"IO_STANDARD": "SB_LVCMOS33"} + Attrs(IO_STANDARD="SB_LVCMOS33") ), ] connectors = [ @@ -65,4 +62,4 @@ class TinyFPGABXPlatform(LatticeICE40Platform): if __name__ == "__main__": from ._blinky import build_and_program - build_and_program(TinyFPGABXPlatform) + build_and_program(TinyFPGABXPlatform, "clk16", 16e6)