From: Richard Sandiford Date: Thu, 28 Dec 2017 20:42:43 +0000 (+0000) Subject: [rs6000] Use gen_int_mode in ieee_128bit_negative_zero X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ec8a1b8d931ccdfa87d712028226a03ff17f6cef;p=gcc.git [rs6000] Use gen_int_mode in ieee_128bit_negative_zero Previously we'd generate a non-canonical zero-extended CONST_INT instead of a sign-extended one, which tripped the assert for canonical CONST_INTs after a later patch. 2017-12-28 Richard Sandiford gcc/ * config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use gen_int_mode rather than GEN_INT. * config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise. From-SVN: r256024 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 680a63a3c82..ad395ef7724 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-12-28 Richard Sandiford + + * config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use + gen_int_mode rather than GEN_INT. + * config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise. + 2017-12-28 Richard Sandiford * emit-rtl.c (gen_const_vec_series): Use valid_for_const_vector_p diff --git a/gcc/config/powerpcspe/powerpcspe.md b/gcc/config/powerpcspe/powerpcspe.md index 78dd79e5805..df93f6d343f 100644 --- a/gcc/config/powerpcspe/powerpcspe.md +++ b/gcc/config/powerpcspe/powerpcspe.md @@ -8113,7 +8113,7 @@ RTVEC_ELT (v, i) = const0_rtx; high = (BYTES_BIG_ENDIAN) ? 0 : 15; - RTVEC_ELT (v, high) = GEN_INT (0x80); + RTVEC_ELT (v, high) = gen_int_mode (0x80, QImode); rs6000_expand_vector_init (operands[0], gen_rtx_PARALLEL (V16QImode, v)); DONE; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 6e27f1f6076..2c310d7cf58 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8055,7 +8055,7 @@ RTVEC_ELT (v, i) = const0_rtx; high = (BYTES_BIG_ENDIAN) ? 0 : 15; - RTVEC_ELT (v, high) = GEN_INT (0x80); + RTVEC_ELT (v, high) = gen_int_mode (0x80, QImode); rs6000_expand_vector_init (operands[0], gen_rtx_PARALLEL (V16QImode, v)); DONE;