From: Gabe Black <gabe.black@gmail.com>
Date: Tue, 24 Nov 2020 04:02:53 +0000 (-0800)
Subject: dev-arm: Set frequency ranges in OSC device tree nodes.
X-Git-Tag: develop-gem5-snapshot~405
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ecaf91a65f848f3d5240446b3a8cc048b05bbb7f;p=gem5.git

dev-arm: Set frequency ranges in OSC device tree nodes.

The existing device tree generation method would use the default
frequency as both the min and max frequency when setting up the OSC
device tree nodes. This would sort of work, except it seems that if
the kernel needed to adjust a frequency, it would fail to do so since
it would assume the new frequency was out of range.

Since the existing property is used to set the initial frequency of
those clocks, and because the default, min and max frequencies are all
mostly independent variables (other than obvious ordering restrictions),
two new properties were added, min_freq and max_freq, which are only
there to fill in the frequency range property in the device tree. If
they aren't set, then the device tree generation method falls back to
the old way of using the default frequency as both min and max.

Change-Id: Ie907bd673f8bcb149e69e45c5b486863149b8a68
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37935
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index bf8e0e6cf..6f12a8b6b 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -244,6 +244,10 @@ class RealViewOsc(ClockDomain):
 
     freq = Param.Clock("Default frequency")
 
+    # These are currently only used for the device tree.
+    min_freq = Param.Clock("0t", "Minimum frequency")
+    max_freq = Param.Clock("0t", "Maximum frequency")
+
     def generateDeviceTree(self, state):
         phandle = state.phandle(self)
         node = FdtNode("osc@" + format(long(phandle), 'x'))
@@ -251,8 +255,16 @@ class RealViewOsc(ClockDomain):
         node.append(FdtPropertyWords("arm,vexpress-sysreg,func",
                                      [0x1, int(self.device)]))
         node.append(FdtPropertyWords("#clock-cells", [0]))
-        freq = int(1.0/self.freq.value) # Values are stored as a clock period
-        node.append(FdtPropertyWords("freq-range", [freq, freq]))
+
+        minf = self.min_freq if self.min_freq.value else self.freq
+        maxf = self.max_freq if self.max_freq.value else self.freq
+
+        # Values are stored as a clock period.
+        def to_freq(prop):
+            return int(1.0 / prop.value)
+
+        node.append(FdtPropertyWords("freq-range",
+                                     [to_freq(minf), to_freq(maxf)]))
         node.append(FdtPropertyStrings("clock-output-names",
                                        ["oscclk" + str(phandle)]))
         node.appendPhandle(self)
@@ -288,10 +300,12 @@ Express (V2M-P1) motherboard. See ARM DUI 0447J for details.
     class Temperature(RealViewTemperatureSensor):
         site, position, dcc = (0, 0, 0)
 
-    osc_mcc = Osc(device=0, freq="50MHz")
-    osc_clcd = Osc(device=1, freq="23.75MHz")
+    osc_mcc = Osc(device=0, min_freq="25MHz", max_freq="60MHz", freq="50MHz")
+    osc_clcd = Osc(device=1, min_freq="23.75MHz", max_freq="63.5MHz",
+                   freq="23.75MHz")
     osc_peripheral = Osc(device=2, freq="24MHz")
-    osc_system_bus = Osc(device=4, freq="24MHz")
+    osc_system_bus = Osc(device=4, min_freq="2MHz", max_freq="230MHz",
+                         freq="24MHz")
 
     # See Table 4.19 in ARM DUI 0447J (Motherboard Express uATX TRM).
     temp_crtl = Temperature(device=0)
@@ -322,11 +336,12 @@ ARM DUI 0604E for details.
         site, position, dcc = (1, 0, 0)
 
     # See Table 2.8 in ARM DUI 0604E (CoreTile Express A15x2 TRM)
-    osc_cpu = Osc(device=0, freq="60MHz")
-    osc_hsbm = Osc(device=4, freq="40MHz")
-    osc_pxl = Osc(device=5, freq="23.75MHz")
-    osc_smb = Osc(device=6, freq="50MHz")
-    osc_sys = Osc(device=7, freq="60MHz")
+    osc_cpu = Osc(device=0, min_freq="20MHz", max_freq="60MHz", freq="60MHz")
+    osc_hsbm = Osc(device=4, min_freq="20MHz", max_freq="40MHz", freq="40MHz")
+    osc_pxl = Osc(device=5, min_freq="23.76MHz", max_freq="165MHz",
+                  freq="23.75MHz")
+    osc_smb = Osc(device=6, min_freq="20MHz", max_freq="50MHz", freq="50MHz")
+    osc_sys = Osc(device=7, min_freq="20MHz", max_freq="60MHz", freq="60MHz")
     osc_ddr = Osc(device=8, freq="40MHz")
 
     def generateDeviceTree(self, state):