From: Ben Skeggs Date: Wed, 15 Aug 2007 04:26:15 +0000 (+1000) Subject: nouveau: Keep drm channel alloc struct around. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ecfa3e4d0aa93ca597a19693c30532655795e9d8;p=mesa.git nouveau: Keep drm channel alloc struct around. --- diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.h b/src/mesa/drivers/dri/nouveau/nouveau_context.h index 37c8f40d098..dc904ad6b35 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_context.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_context.h @@ -44,17 +44,16 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include "xmlconfig.h" -typedef struct nouveau_fifo_t{ - int channel; - u_int32_t* buffer; - u_int32_t* mmio; - u_int32_t put_base; - u_int32_t current; - u_int32_t put; - u_int32_t free; - u_int32_t max; -} -nouveau_fifo; +typedef struct nouveau_fifo { + struct drm_nouveau_channel_alloc drm; + uint32_t *pushbuf; + uint32_t *mmio; + uint32_t *notifier_block; + uint32_t current; + uint32_t put; + uint32_t free; + uint32_t max; +} nouveau_fifo_t; #define TAG(x) nouveau##x #include "tnl_dd/t_dd_vertex.h" @@ -94,13 +93,7 @@ typedef struct nouveau_context { GLcontext *glCtx; /* The per-context fifo */ - nouveau_fifo fifo; - - /* The read-only regs */ - volatile unsigned char* mmio; - - /* The per-channel notifier block */ - volatile void *notifier_block; + nouveau_fifo_t fifo; /* Physical addresses of AGP/VRAM apertures */ uint64_t vram_phys; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c index 4208819d025..5dc94e0520a 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c @@ -57,7 +57,8 @@ void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size) if(nmesa->fifo.put >= fifo_get) { nmesa->fifo.free = nmesa->fifo.max - nmesa->fifo.current; if(nmesa->fifo.free < size+1) { - OUT_RING(NV03_FIFO_CMD_JUMP | nmesa->fifo.put_base); + OUT_RING(NV03_FIFO_CMD_JUMP | + nmesa->fifo.drm.put_base); if(fifo_get <= RING_SKIPS) { if(nmesa->fifo.put <= RING_SKIPS) /* corner case - will be idle */ NV_FIFO_WRITE_PUT(RING_SKIPS + 1); @@ -98,54 +99,54 @@ void nouveauWaitForIdle(nouveauContextPtr nmesa) // here we call the fifo initialization ioctl and fill in stuff accordingly GLboolean nouveauFifoInit(nouveauContextPtr nmesa) { - struct drm_nouveau_channel_alloc fifo_init; int i, ret; #ifdef NOUVEAU_RING_DEBUG return GL_TRUE; #endif - fifo_init.fb_ctxdma_handle = NvDmaFB; - fifo_init.tt_ctxdma_handle = NvDmaTT; - ret=drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_CHANNEL_ALLOC, &fifo_init, sizeof(fifo_init)); + nmesa->fifo.drm.fb_ctxdma_handle = NvDmaFB; + nmesa->fifo.drm.tt_ctxdma_handle = NvDmaTT; + ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_CHANNEL_ALLOC, + &nmesa->fifo.drm, sizeof(nmesa->fifo.drm)); if (ret) { - FATAL("Fifo initialization ioctl failed (returned %d)\n",ret); + FATAL("Fifo initialization ioctl failed (returned %d)\n", ret); return GL_FALSE; } - ret = drmMap(nmesa->driFd, fifo_init.cmdbuf, fifo_init.cmdbuf_size, &nmesa->fifo.buffer); + ret = drmMap(nmesa->driFd, nmesa->fifo.drm.cmdbuf, + nmesa->fifo.drm.cmdbuf_size, &nmesa->fifo.pushbuf); if (ret) { - FATAL("Unable to map the fifo (returned %d)\n",ret); + FATAL("Unable to map the fifo (returned %d)\n", ret); return GL_FALSE; } - ret = drmMap(nmesa->driFd, fifo_init.ctrl, fifo_init.ctrl_size, &nmesa->fifo.mmio); + ret = drmMap(nmesa->driFd, nmesa->fifo.drm.ctrl, + nmesa->fifo.drm.ctrl_size, &nmesa->fifo.mmio); if (ret) { - FATAL("Unable to map the control regs (returned %d)\n",ret); + FATAL("Unable to map the control regs (returned %d)\n", ret); return GL_FALSE; } - ret = drmMap(nmesa->driFd, fifo_init.notifier, - fifo_init.notifier_size, - &nmesa->notifier_block); + ret = drmMap(nmesa->driFd, nmesa->fifo.drm.notifier, + nmesa->fifo.drm.notifier_size, + &nmesa->fifo.notifier_block); if (ret) { - FATAL("Unable to map the notifier block (returned %d)\n",ret); + FATAL("Unable to map the notifier block (returned %d)\n", ret); return GL_FALSE; } /* Setup our initial FIFO tracking params */ - nmesa->fifo.channel = fifo_init.channel; - nmesa->fifo.put_base = fifo_init.put_base; nmesa->fifo.current = 0; nmesa->fifo.put = 0; - nmesa->fifo.max = (fifo_init.cmdbuf_size >> 2) - 1; + nmesa->fifo.max = (nmesa->fifo.drm.cmdbuf_size >> 2) - 1; nmesa->fifo.free = nmesa->fifo.max - nmesa->fifo.current; for (i=0; ififo.free -= RING_SKIPS; - MESSAGE("Fifo init ok. Using context %d\n", fifo_init.channel); + MESSAGE("Fifo init ok. Using context %d\n", nmesa->fifo.drm.channel); return GL_TRUE; } diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h index 23325dcea53..956dd549dca 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h @@ -48,14 +48,14 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define NV_FIFO_READ(reg) *(volatile u_int32_t *)(nmesa->fifo.mmio + (reg/4)) #define NV_FIFO_WRITE(reg,value) *(volatile u_int32_t *)(nmesa->fifo.mmio + (reg/4)) = value; -#define NV_FIFO_READ_GET() ((NV_FIFO_READ(NV03_FIFO_REGS_DMAGET) - nmesa->fifo.put_base) >> 2) +#define NV_FIFO_READ_GET() ((NV_FIFO_READ(NV03_FIFO_REGS_DMAGET) - nmesa->fifo.drm.put_base) >> 2) #define NV_FIFO_WRITE_PUT(val) do { \ if (NOUVEAU_RING_TRACE) {\ printf("FIRE_RING : 0x%08x\n", nmesa->fifo.current << 2); \ fflush(stdout); \ sleep(1); \ } \ - NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT, ((val)<<2) + nmesa->fifo.put_base); \ + NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT, ((val)<<2) + nmesa->fifo.drm.put_base); \ } while(0) /* @@ -110,20 +110,20 @@ nouveau_fifo_remaining-=sz; \ uint32_t* p=(uint32_t*)(ptr); \ int i; printf("OUT_RINGp: (size 0x%x dwords) (%s)\n",sz, __func__); for(i=0;ififo.current+i) << 2, *(p+i), *((float*)(p+i))); \ } \ - memcpy(nmesa->fifo.buffer+nmesa->fifo.current,ptr,(sz)*4); \ + memcpy(nmesa->fifo.pushbuf+nmesa->fifo.current,ptr,(sz)*4); \ nmesa->fifo.current+=(sz); \ }while(0) #define OUT_RING(n) do { \ if (NOUVEAU_RING_TRACE) \ printf("OUT_RINGn: [0x%08x] 0x%08x (%s)\n", nmesa->fifo.current << 2, n, __func__); \ -nmesa->fifo.buffer[nmesa->fifo.current++]=(n); \ +nmesa->fifo.pushbuf[nmesa->fifo.current++]=(n); \ }while(0) #define OUT_RINGf(n) do { \ if (NOUVEAU_RING_TRACE) \ printf("OUT_RINGf: [0x%08x] %.04f (%s)\n", nmesa->fifo.current << 2, n, __func__); \ -*((float*)(nmesa->fifo.buffer+nmesa->fifo.current++))=(n); \ +*((float*)(nmesa->fifo.pushbuf+nmesa->fifo.current++))=(n); \ }while(0) #define BEGIN_RING_SIZE(subchannel,tag,size) do { \ diff --git a/src/mesa/drivers/dri/nouveau/nouveau_object.c b/src/mesa/drivers/dri/nouveau/nouveau_object.c index f6ff37848af..aff6954f066 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_object.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_object.c @@ -10,7 +10,7 @@ GLboolean nouveauCreateContextObject(nouveauContextPtr nmesa, struct drm_nouveau_grobj_alloc cto; int ret; - cto.channel = nmesa->fifo.channel; + cto.channel = nmesa->fifo.drm.channel; cto.handle = handle; cto.class = class; ret = drmCommandWrite(nmesa->driFd, DRM_NOUVEAU_GROBJ_ALLOC, diff --git a/src/mesa/drivers/dri/nouveau/nouveau_sync.c b/src/mesa/drivers/dri/nouveau/nouveau_sync.c index e7abdd60eeb..2ca038f4f8e 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_sync.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_sync.c @@ -37,7 +37,8 @@ #define NOTIFIER(__v) \ nouveauContextPtr nmesa = NOUVEAU_CONTEXT(ctx); \ - volatile uint32_t *__v = (void*)nmesa->notifier_block + notifier->offset + volatile uint32_t *__v = (void*)nmesa->fifo.notifier_block + \ + notifier->offset struct drm_nouveau_notifierobj_alloc * nouveau_notifier_new(GLcontext *ctx, GLuint handle, GLuint count) @@ -53,7 +54,7 @@ nouveau_notifier_new(GLcontext *ctx, GLuint handle, GLuint count) if (!notifier) return NULL; - notifier->channel = nmesa->fifo.channel; + notifier->channel = nmesa->fifo.drm.channel; notifier->handle = handle; notifier->count = count; ret = drmCommandWriteRead(nmesa->driFd, DRM_NOUVEAU_NOTIFIEROBJ_ALLOC,