From: Sebastien Bourdeauducq Date: Tue, 12 Mar 2013 15:16:06 +0000 (+0100) Subject: fhdl/verilog: implicit get_fragment X-Git-Tag: 24jan2021_ls180~2099^2~654 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ecfe1646ec4600a12a5e33da63b7947c1f205b42;p=litex.git fhdl/verilog: implicit get_fragment --- diff --git a/migen/fhdl/verilog.py b/migen/fhdl/verilog.py index c5ba2272..795fcf00 100644 --- a/migen/fhdl/verilog.py +++ b/migen/fhdl/verilog.py @@ -260,6 +260,8 @@ def convert(f, ios=None, name="top", return_ns=False, special_overrides=dict(), display_run=False): + if not isinstance(f, Fragment): + f = f.get_fragment() if ios is None: ios = set() if clock_domains is None: