From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 5 Sep 2022 11:20:26 +0000 (+0100)
Subject: remove yet more f"" specifiers
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ed5943dd6453c393d184fed1b52cfcb99d7f8820;p=openpower-isa.git

remove yet more f"" specifiers
---

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 7bb7bf4e..242ff5bb 100644
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -1536,17 +1536,13 @@ class ISACaller(ISACallerHelper, ISAFPHelpers):
         if name in ['CA', 'CA32']:
             if carry_en:
                 log("writing %s to XER" % name, output)
-                log(f"write XER field {name}: "
-                    f"0x{output.value % (1 << 64):X}",
-                    kind=LogKind.InstrInOuts)
+                log("write XER %s 0x%x" % (name, output.value))
                 self.spr['XER'][XER_bits[name]] = output.value
             else:
                 log("NOT writing %s to XER" % name, output)
         elif name in info.special_regs:
             log('writing special %s' % name, output, special_sprs)
-            log(f"write reg {name}: "
-                f"0x{output.value % (1 << 64):X}",
-                kind=LogKind.InstrInOuts)
+            log("write reg %s 0x%x" % (name, output.value))
             if name in special_sprs:
                 self.spr[name] = output
             else: