From: Jim Wilson <jimw@sifive.com>
Date: Fri, 6 Jul 2018 03:14:47 +0000 (+0000)
Subject: RISC-V: Add support for riscv-*-*.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=edace3e2295db80d32b1a77676a3697c5029d71b;p=gcc.git

RISC-V: Add support for riscv-*-*.

	* config.gcc (riscv*-*-*): When setting xlen, handle riscv-*.

From-SVN: r262463
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6ede47261a8..22991846d52 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2018-07-05  Jim Wilson  <jimw@sifive.com>
+
+	* config.gcc (riscv*-*-*): When setting xlen, handle riscv-*.
+
 2018-07-05  Indu Bhagat  <indu.bhagat@oracle.com> 
 
 	* config/aarch64/aarch64-simd.md: correct flags text for 
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 63162aab676..78e84c2b864 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4091,7 +4091,7 @@ case "${target}" in
 		supported_defaults="abi arch tune"
 
 		case "${target}" in
-		riscv32*) xlen=32 ;;
+		riscv-* | riscv32*) xlen=32 ;;
 		riscv64*) xlen=64 ;;
 		*) echo "Unsupported RISC-V target ${target}" 1>&2; exit 1 ;;
 		esac