From: Uros Bizjak Date: Fri, 30 Dec 2016 15:10:45 +0000 (+0100) Subject: predicates.md (ext_register_operand): Do not reject registers without upper parts... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=edf5d079d3471991fe30ab870910481ce85aa925;p=gcc.git predicates.md (ext_register_operand): Do not reject registers without upper parts here. * config/i386/predicates.md (ext_register_operand): Do not reject registers without upper parts here. * config/i386/i386.md (extv): Copy registers without upper parts in operand 1 to a pseudo. (extzv): Ditto. (insv): Ditto. From-SVN: r243976 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dddf6b64d51..629c5509a92 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2016-12-30 Uros Bizjak + + * config/i386/predicates.md (ext_register_operand): Do not reject + registers without upper parts here. + * config/i386/i386.md (extv): Copy registers without + upper parts in operand 1 to a pseudo. + (extzv): Ditto. + (insv): Ditto. + 2016-12-30 Gerald Pfeifer * doc/standards.texi (Standards): Remove broken reference to diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 7a1ff76be56..b1a8814b1f9 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2766,7 +2766,10 @@ if (INTVAL (operands[2]) != 8 || INTVAL (operands[3]) != 8) FAIL; - if (! ext_register_operand (operands[1], VOIDmode)) + unsigned int regno = reg_or_subregno (operands[1]); + + /* Be careful to expand only with registers having upper parts. */ + if (regno <= LAST_VIRTUAL_REGISTER && !QI_REGNO_P (regno)) operands[1] = copy_to_reg (operands[1]); }) @@ -2794,7 +2797,10 @@ if (INTVAL (operands[2]) != 8 || INTVAL (operands[3]) != 8) FAIL; - if (! ext_register_operand (operands[1], VOIDmode)) + unsigned int regno = reg_or_subregno (operands[1]); + + /* Be careful to expand only with registers having upper parts. */ + if (regno <= LAST_VIRTUAL_REGISTER && !QI_REGNO_P (regno)) operands[1] = copy_to_reg (operands[1]); }) @@ -2878,10 +2884,13 @@ if (INTVAL (operands[1]) != 8 || INTVAL (operands[2]) != 8) FAIL; - dst = operands[0]; - - if (!ext_register_operand (dst, VOIDmode)) - dst = copy_to_reg (dst); + unsigned int regno = reg_or_subregno (operands[0]); + + /* Be careful to expand only with registers having upper parts. */ + if (regno <= LAST_VIRTUAL_REGISTER && !QI_REGNO_P (regno)) + dst = copy_to_reg (operands[0]); + else + dst = operands[0]; emit_insn (gen_insv_1 (dst, operands[3])); diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index a1ea34f4f28..b0b9ce22705 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -85,20 +85,13 @@ (and (match_code "reg") (match_test "REGNO (op) == FLAGS_REG"))) -;; Match an SI or HImode register for a zero_extract. +;; Match a DI, SI or HImode register for a zero_extract. (define_special_predicate "ext_register_operand" - (match_operand 0 "register_operand") -{ - if ((!TARGET_64BIT || GET_MODE (op) != DImode) - && GET_MODE (op) != SImode && GET_MODE (op) != HImode) - return false; - if (SUBREG_P (op)) - op = SUBREG_REG (op); - - /* Be careful to accept only registers having upper parts. */ - return (REG_P (op) - && (REGNO (op) > LAST_VIRTUAL_REGISTER || QI_REGNO_P (REGNO (op)))); -}) + (and (match_operand 0 "register_operand") + (ior (and (match_test "TARGET_64BIT") + (match_test "GET_MODE (op) == DImode")) + (match_test "GET_MODE (op) == SImode") + (match_test "GET_MODE (op) == HImode")))) ;; Match register operands, but include memory operands for TARGET_SSE_MATH. (define_predicate "register_ssemem_operand"