From: Daniel Benusovich <flyingmonkeys1996@gmail.com>
Date: Mon, 22 Apr 2019 01:24:07 +0000 (-0700)
Subject: Add ubit test for set associative
X-Git-Tag: div_pipeline~2194
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ee2045c20c52b3b6681878e17ee42f99d99f5bab;p=soc.git

Add ubit test for set associative
---

diff --git a/TLB/test/test_set_associative_cache.py b/TLB/test/test_set_associative_cache.py
new file mode 100644
index 00000000..d681425f
--- /dev/null
+++ b/TLB/test/test_set_associative_cache.py
@@ -0,0 +1,39 @@
+import sys
+sys.path.append("../src")
+sys.path.append("../../TestUtil")
+
+from nmigen.compat.sim import run_simulation
+
+from SetAssociativeCache import SetAssociativeCache
+
+from test_helper import assert_eq, assert_ne, assert_op
+
+def set_sac(dut, e, c, s, t, d):
+    yield dut.enable.eq(e)
+    yield dut.command.eq(c)
+    yield dut.cset.eq(s)
+    yield dut.tag.eq(t)
+    yield dut.data_i.eq(d)
+    yield
+
+def testbench(dut):
+    enable = 1
+    command = 2
+    cset = 1
+    tag = 2
+    data = 3
+    yield from set_sac(dut, enable, command, cset, tag, data)
+    yield
+
+    enable = 1
+    command = 2
+    cset = 1
+    tag = 5
+    data = 8
+    yield from set_sac(dut, enable, command, cset, tag, data)
+    yield
+
+if __name__ == "__main__":
+    dut = SetAssociativeCache(4, 4, 4, 4)
+    run_simulation(dut, testbench(dut), vcd_name="Waveforms/test_set_associative_cache.vcd")
+    print("Set Associative Cache Unit Test Success")