From: lkcl <lkcl@web>
Date: Thu, 8 Jun 2023 14:11:41 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ee4270657d70b5402c044ffe93f8f042a201333e;p=libreriscv.git

---

diff --git a/openpower/sv/po9_encoding/discussion.mdwn b/openpower/sv/po9_encoding/discussion.mdwn
index 55fa68d0a..609dc6172 100644
--- a/openpower/sv/po9_encoding/discussion.mdwn
+++ b/openpower/sv/po9_encoding/discussion.mdwn
@@ -18,8 +18,8 @@
 
 Fields:
 
-* RM 24-bit SVP64 prefix
-* SVP64 `RM <- rm0 || rm1`
+* `RM`: 24-bit SVP64 prefix
+* `RM <- rm0 || rm1` split field
 
 Length detection:
 
@@ -50,6 +50,9 @@ the complexity of attempting to fit 32-bit instructions into
 PO9 is very high. encoding (1) attempts to fit `setvl` etc. into
 32-bit but it is very tight.
 
+* `setvl` - Unvectorizable, EXT0xx, 6-bit XO (including Rc=1)
+* `psetvl` - Unvectorizable, EXT1xx
+
 
 ```
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