From: Palmer Dabbelt <palmer@rivosinc.com>
Date: Thu, 26 Jan 2023 23:09:29 +0000 (-0800)
Subject: gdb/doc: The RISC-V vector registers didn't change
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ee65c8f578bd531b1bf393cd79787dada3d1eb39;p=binutils-gdb.git

gdb/doc: The RISC-V vector registers didn't change

When we merged the GDB vector register support we did it a bit early,
just eating the risk in the very unlikely case that the vector register
names changed.  They didn't, so we can now remove the caveat in the docs
that they might.
---

diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo
index 2a2077c29d1..c1ca45521ea 100644
--- a/gdb/doc/gdb.texinfo
+++ b/gdb/doc/gdb.texinfo
@@ -48227,11 +48227,7 @@ other floating point hardware.
 
 The @samp{org.gnu.gdb.riscv.vector} feature is optional.  If present,
 it should contain registers @samp{v0} through @samp{v31}, all of which
-must be the same size.  These requirements are based on the v0.10
-draft vector extension, as the vector extension is not yet final.  In
-the event that the register set of the vector extension changes for
-the final specification, the requirements given here could change for
-future releases of @value{GDBN}.
+must be the same size.
 
 @node RX Features
 @subsection RX Features