From: Chad Versace <chad.versace@intel.com>
Date: Tue, 5 Jan 2016 22:28:28 +0000 (-0800)
Subject: isl: Don't align phys_slice0_sa.width twice
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eea2d4d05987b4f8ad90a1588267f9495f1e9e99;p=mesa.git

isl: Don't align phys_slice0_sa.width twice

It's already aligned to the format's block width. Don't align it again
in isl_calc_row_pitch().
---

diff --git a/src/isl/isl.c b/src/isl/isl.c
index 4a1c9f4a94a..72fc4b8d9e1 100644
--- a/src/isl/isl.c
+++ b/src/isl/isl.c
@@ -821,8 +821,8 @@ isl_calc_row_pitch(const struct isl_device *dev,
     *    texels, and must be converted to bytes based on the surface format
     *    being used to determine whether additional pages need to be defined.
     */
-   row_pitch = MAX(row_pitch,
-                   fmtl->bs * isl_align_div_npot(phys_slice0_sa->w, fmtl->bw));
+   assert(phys_slice0_sa->w % fmtl->bw == 0);
+   row_pitch = MAX(row_pitch, fmtl->bs * phys_slice0_sa->w);
 
    switch (tile_info->tiling) {
    case ISL_TILING_LINEAR: