From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 16 Feb 2015 22:39:12 +0000 (+0100)
Subject: test: we can now test regs with Etherbone
X-Git-Tag: 24jan2021_ls180~2604^2~13
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eeaf03669abd858cd08d0ddda4ed962665eebc5c;p=litex.git

test: we can now test regs with Etherbone
---

diff --git a/test/config.py b/test/config.py
index 44d8fcee..5d367ccd 100644
--- a/test/config.py
+++ b/test/config.py
@@ -1,9 +1,14 @@
-from litescope.host.driver import LiteScopeUART2WBDriver
+use_uart = 0
+use_eth = 1
 
 csr_csv_file = "./csr.csv"
 busword = 32
 debug_wb = False
 
-com = 2
-baud = 921600
-wb = LiteScopeUART2WBDriver(com, baud, csr_csv_file, busword, debug_wb)
\ No newline at end of file
+if use_uart:
+	from litescope.host.driver import LiteScopeUART2WBDriver
+	wb = LiteScopeUART2WBDriver(2, 921600, csr_csv_file, busword, debug_wb)
+
+if use_eth:
+	from litescope.host.driver import LiteScopeEtherboneDriver
+	wb = LiteScopeEtherboneDriver("192.168.1.40", 20000, csr_csv_file, debug_wb)
diff --git a/test/test_regs.py b/test/test_regs.py
index a62de8c8..4b9f9bc7 100644
--- a/test/test_regs.py
+++ b/test/test_regs.py
@@ -7,5 +7,8 @@ regs.phy_crg_reset.write(1)
 print("sysid     : 0x%04x" %regs.identifier_sysid.read())
 print("revision  : 0x%04x" %regs.identifier_revision.read())
 print("frequency : %d MHz" %(regs.identifier_frequency.read()/1000000))
+SRAM_BASE = 0x02000000
+wb.write(SRAM_BASE, [i for i in range(64)])
+print(wb.read(SRAM_BASE, 64))
 ###
 wb.close()